• Product compatibility test with global smartphone manufacturer underway
• Secures top-notch competitiveness in price, quality for NAND product
• Expects NAND technology competitiveness to drive earnings rebound in 2H

Seoul, June 8, 2023

SK hynix Inc. (or “the company”, www.skhynix.com) announced today that it has started mass production of its 238-layer 4D NAND Flash memory, following the development in August 2022, and that product compatibility test with a global smartphone manufacturer is underway.

“SK hynix has developed solution products for smartphones and client SSDs which are used as PC storage devices, adopting the 238-layer NAND technology, and has moved into mass production in May,” the company said. “Given that the company secured world-class competitiveness in price, performance and quality for both 238-layer NAND and the previous generation 176-layer NAND, we expect these products to drive earnings improvement in the second half of the year.”

The 238-layer product – the smallest NAND in size – has a 34% higher manufacturing efficiency compared to the previous generation of 176-layer, resulting in a significant improvement in cost competitiveness.

Besides, with a data-transfer speed of 2.4Gb per second, a 50% increase from the previous generation, and approximately 20% increase in read and write speed, the company is confident that it will be able to deliver an improved performance to the smartphone and PC customers using this technology.

Once the product compatibility test with the global smartphone manufacturer is completed, SK hynix will begin supplying the 238-layer NAND product for smartphones, and expand the technology across its product portfolio such as PCIe 5.0^* SSDs and high-capacity server SSDs going forward.

^*PCIe 5.0: PCIe(Peripheral Component Interconnect Express) is a serial-structured high-speed input/output interface used in the main boards of digital devices, with PCIe 5.0 doubling the data rate to 32GT/s(Gigatransfer per second) from PCIe 4.0

“We will continue to overcome NAND technology limitations and increase our competitiveness so that we can achieve a bigger turnaround than anyone else during the upcoming market rebound,” said Jumsoo Kim, Head of S238 NAND at SK hynix.

About SK hynix Inc.

SK hynix Inc., headquartered in Korea, is the world’s top tier semiconductor supplier offering Dynamic Random Access Memory chips (“DRAM”), flash memory chips (“NAND flash”) and CMOS Image Sensors (“CIS”) for a wide range of distinguished customers globally. The Company’s shares are traded on the Korea Exchange, and the Global Depository shares are listed on the Luxembourg Stock Exchange. Further information about SK hynix is available at www.skhynix.com, news.skhynix.com.

Media Contact

SK hynix Inc.
Global Public Relations

Technical Leader
Joori Roh
E-Mail: global_newsroom@skhynix.com

Technical Leader
Kanga Kong
E-Mail: global_newsroom@skhynix.com

The post SK hynix Begins Mass Production of Industry’s Highest 238-Layer 4D NAND first appeared on SK hynix Newsroom.

“We showcased our 4D NAND technology that will become the standard for the next generation.”

SK hynix’s Head of NAND development, Jungdal Choi, shared his thoughts after attending the Flash Memory Summit 2022 (FMS 2022), where SK hynix clearly demonstrated its competitiveness in cutting-edge technology in both DRAM and NAND, which dovetail nicely to lay the foundation for its future.

Flexing its technological muscle at FMS 2022, SK hynix is set to become a leader in ICT technology development. The current 4D NAND technology is recognized as an industry standard, thanks to its developers’ dedication and ceaseless efforts. The company also plans to continue supporting technological innovation that will help set the next-generation standard of 4D NAND technology.

Image 1. Jungdal Choi, Head of NAND Development, delivers his keynote speech at the Flash Memory Summit 2022.

The Newsroom team hosted an FMS debriefing session, meeting with Jungdal Choi (Head of NAND Development), Jumsoo Kim (Head of S238 NAND), Jaesung Sim (Head of NAND QLC), Woopyo Jeong (Head of NAND Design), and Keumhwan Noh (Head of NAND PE C&R). Read on to hear snippets of the conversation, where the execs share their views on how they know SK hynix is poised to become the undisputed leader in NAND technology.

Showing the world 4D NAND’s core competitiveness

SK hynix was a key participant in FMS 2022, according to Jungdal Choi, Head of NAND development, where it introduced various products and new technologies including a 238-layer 512Gb (gigabit) TLC^* 4D NAND (238-layer NAND). SK hynix’s 4D^2.0 technology, which overcame the limitations of vertical stacking, was of particular interest.

*Triple Level Cell (TLC): NAND Flash products are categorized into Single Level Cell, Multi Level Cell, Triple Level Cell, Quadruple Level Cell and Penta Level Cell depending on the number of information (unit: bit) contained in a single cell. That a cell contains more information means more data can be stored within the same extent of area.

Choi, who spearheaded SK hynix’s presence at the event, explained the meaning of the participation and achievements as follows. “FMS 2022 raised SK hynix’s status through our differentiated NAND technology. It was a valuable opportunity to inform the world of SK hynix’s technological direction and of our 4D NAND core competitiveness,” Choi stated, giving an overview of the company’s goals and achievements at the event.

Image 2. Jungdal Choi, Head of NAND Development, discusses the core competitiveness of 4D NAND with other key members of the NAND department.

Q. What is the core competitiveness of 4D NAND?

Jungdal Choi NAND’s core competitiveness depends on securing the industry’s most stringent management in terms of scheduling, cost, quality, and performance, as well as developing competitive products with differentiated and unique technology. In 2018, we succeeded in commercializing our own industry-first, 96-layer 4D NAND, achieving the highest technological level in the industry. Additionally, based on our expertise accumulated from developing the 96-layer NAND, we developed the industry’s first 128-layer, 176-layer, and 238-layer NAND, gaining a technological advantage in the process.

The core technologies of 4D NAND that have led to these results are largely represented by three categories:

Sideway Source is a technology that horizontally connects the source, which is the electrons pathway. This technology lessens the dependence on the vertical structure of cell stacking and alignment issues between sources, and as a result, it is easy to secure yields.

All PUC (Peri Under Cell) is a technology that places the entire peripheral circuit (Peri.) under the cell. Thanks to this technology, chips size can be further reduced, and production efficiency is maximized.

Advanced CTF is a technology that stores electric charges in a CTF (Charge Trap Flash), which is an insulator, rather than a floating gate, which is a conductor. Compared to the floating gate storage method, cell area per unit can be reduced and read/write performance can be improved.

Image 3. Peri. Under Cell (PUC): A technology that maximizes production efficiency by placing peripheral circuits under the cell array.

Image 4. Charge Trap Flash (CTF): Unlike floating gate, which stores electric charges in conductors, CTF stores electric charges in insulators, which eliminates interference between cells, improving read and write performance while reducing cell area per unit compared to floating gate technology.

Q. Which products and technologies received most of the audience’s attention?

Jungdal Choi There was a lot of interest in the world’s highest and smallest 238-layer NAND flash. In addition to QLC, there were many questions about floating gate-based PLC and a software solution that can maximize the performance of CXL (Compute Express Link)^*. People were very interested in the introduction of highest quality evaluation from customers and SSD products based on ultra-high-layered NAND. In addition, we are shaping the direction of technological innovation and serving as a leader in the NAND industry by defining next generation 4D NAND with 4D^2.0 technology, which realizes both high capacity and performance while overcoming the limitations of cell stacking. I was able to feel firsthand that SK hynix’s technology and products are garnering interest.

^*CXL: A next-generation interface for efficient utilization of high-performance computing systems. As a memory solution that can increase bandwidth and capacity cost-efficiently, SK hynix recently developed a 96GB CXL memory sample based on DDR5 DRAM.

Jungdal Choi These progressive and innovative technologies were achieved thanks to close collaboration with business partners and rooted in customer satisfaction. Most importantly, I believe that this success is based on the VWBE^* initiative and the ambitious spirit among SK hynix employees, or “hy-gineers”, as we call them. The reason we were able to develop our proprietary technology and grow rapidly was thanks to our employees’ efforts and passion. We will not be satisfied resting on our laurels and will strive to continue to grow together.

^*VWBE: Voluntary and Willing Brain Engagement. It is one of the employee values emphasized by SK Management System, or SKMS.

Surprise launch of 238-layer TLC 4D NAND, emphasis on technological superiority

As Choi pointed out earlier, the 238-layer NAND garnered a great deal of attention at the event. Jumsoo Kim, the head of S238 NAND who led the product development, said, “We garnered unprecedented attention as our chip size was reduced by more than 30% while applying advanced technologies such as the All PUC structure.”

Kim also emphasized that the product has technological advantages in cell writing speed (tPROG, the Programing Time), input/output speed (I/O speed), reading power efficiency, and bit growth.

Image 5. Jumsoo Kim, Head of S238 NAND, explains the 238-layer TLC 4D NAND’s technological superiority.

Q. Could you please explain the features of 238-layer NAND in a little more detail?

Jumsoo Kim When it comes to SSD performance, the most important factors are cell writing speed and I/O speed. Cell writing speed improved by 10% and this product also boasts speeds of 2.4 Gb per second, which is 50% faster than the previous generation, while reading power efficiency has also been improved by 20%. This is a product that meets market demand in a situation where customers are turning to low-power products.

Meanwhile, the products are also extraordinary in terms of bit growth: SK hynix can expect 34%-bit growth thanks to a dramatic reduction in the chip size.

QLC/PLC development is also on an upward trend… targets the future NAND market

SK hynix made a splash at FMS by unveiling 176-layer QLC NAND, 238-layer QLC NAND for mobile applications, and 192-layer QLC NAND adopting floating gate technology. In particular, the 176-layer 1Tb (terabit) QLC NAND doubled the I/O speed (1.6Gbps) compared to the 96-layer 1Tb QLC NAND and the read and write performance improved by 42% and 18%, respectively. “Our world record definitely stood out in the QLC area as well,” said Jaesung Sim, Head of NAND QLC, as he introduced the major products unveiled at the event.

Image 6. Jaesung Sim, Head of NAND QLC, explains the major products unveiled at FMS, including the 176-layer 1Tb QLC.

Q. What is the current development status of the 238-layer mobile QLC NAND and 192-layer QLC NAND?

Jaesung Sim We expect to do a full-fledged development for the mobile QLC. Accordingly, SK hynix is developing a 238-layer mobile QLC NAND. The 192-layer QLC for cSSD and eSSDs is also being developed by using floating gate technology with excellent multi-bit retention characteristics. Development of PLCs with a 25% increase in bit density per cell compared to QLC is also on the way as we speak.

Q. What efforts are you making to increase the number of stacks and bit density?

Jaesung Sim SK hynix pre-emptively developed 4D NAND technology and applied multi-row^* technology, while rapidly changing the technological direction to multi-bit such as QLC and PLC. As a result, the company soon boasted the highest number of cell stacks and bit density in the industry. This was possible due to the quality maintenance process as well as design and testing technologies.

^*Multi-row is a technology for continuously arranging multiple cell-stacked structures, similar to placing multiple apartment buildings next to each other in an apartment complex.

Introducing 4D^2.0 technology while looking ahead to the next-generation technology standard

As one might assume from Sim’s explanation, SK hynix is continuously developing next-generation technologies that break through technological limits. This contributed to the introduction of the 4D^2.0 technology.

4D^1.0 reduces chip sizes by placing the NAND peripheral circuit (Peri.) under the cell area. With 4D^1.0, chip sizes are reduced but the number of cell stacks must be increased. Although this has the advantage of being able to implement high density within a fixed area, the disadvantage is that the stacking technology could reach its limit. SK hynix solved this problem by horizontally increasing the cell density, a technological concept known as 4D^2.0. According to Woopyo Jeong, Head of NAND design, this technology is expected to be the next-generation standard.

Image 7. Woopyo Jeong, Head of NAND Design, explaining 4D^2.0 that overcomes the stacking limit by increasing horizontal density.

Q. What is the core technology of 4D^2.0?

Woopyo Jeong Multi-Site Cells (MSCs), which store data by dividing existing cells into two smaller cells via micro fabrication is the key, because we can expect to reduce the number of cell stacks while increasing cell density. For example, suppose that 6-bit data is stored in one cell. This can be implemented by combining the two signals 0 and 1 into 2⁶=64 different (voltage) states. However, it is very difficult to create 64 states in a limited voltage range.

However, if we use MSC technology, which combines two cells, we can implement a total of 64 (8×8) states by creating 3 bits per cell, that is, 2³=8. As a result, the 3-bit MSC secures the same capacity as a 6-bit cell, which is difficult to implement using a single cell.

Q. What will the future of the NAND market that 4D^2.0 will create look like?

Woopyo Jeong If vertical stacking and size reduction are repeated, cell quality inevitably deteriorates. Therefore, in the future, it will be difficult to increase data capacity using only stacking technologies. However, 4D^2.0, which utilizes MSCs as the core to horizontally increase density, can overcome this limitation. This is expected to become an industry standard in the future.

As technology becomes more sophisticated, quality is our top priority

As NAND technology advances, it will be difficult to secure the best quality. SK hynix also faced numerous difficulties during the development process and had no choice but to work harder at improving quality. Accordingly, Keumhwan Noh, Head of NAND PE C&R, emphasized quality as a top priority, saying, “The excellent quality of SK hynix will continue in the future.”

In a recent quality evaluation survey of major mobile and SSD companies, SK hynix’s 128-layer and 176-layer NAND products ranked first. Noh argued that the stabilization of the 4D NAND development platform and mass production was the main reason, along with the significantly reduced number of defects. SK hynix is currently developing new products based on stabilized processes and is planning to introduce various quality improvement technologies and solutions.

Image 8. Keumhwan Noh, Head of NAND PE C&R, reveals challenges related to NAND quality improvement.

Q. What are the biggest issues related to quality and the challenges ahead?

Keumhwan Noh As the number of cell stacks continues to increase, the gap between cells will become narrower. Therefore, it is highly likely that defects in the cell region will increase. To respond to these issues, SK hynix is seeking a wide array of measures such as strengthening NAND Design for Manufacturing (DFM)^* initiative, reinforcing inline management, source quality advancement using AI machine learning, and controlling defects by utilizing solution algorithms.

^*DFM (Design for Manufacturing): Design in consideration of the manufacturing environment, which makes a reliable product or a design for productivity.

SK hynix plans to upgrade its products in line with technological trends, mass-produce 238-layer NAND in the first half of next year, and consecutively release mobile-oriented products, cSSDs and eSSDs. In order to respond to high-capacity demand, the company is preparing 238-layer 1Tb QLC products, strengthening multi-bit storage capacity from QLC to PLC, and preparing the next-generation technology of 4D^2.0.

After the session, Jungdal Choi said, “Looking back at the ICT industry over the past 10 plus years, only companies with their own unique technology were able to secure their status as top global technology companies. We will maintain our competitiveness through successful ramp-ups (yield improvement) of 4D^1.0 and innovation with our proprietary 4D^2.0 NAND technology.”

The post FMS 2022 Reflections: SK hynix Poised to Become Next Generation 4D NAND Leader first appeared on SK hynix Newsroom.

SK hynix joined the August 2-4 event at the Santa Clara Convention Center in California, the first in-person FMS since 2019. In the event’s keynote and other sessions, company executives and project leaders discussed new products and the challenges that went into their development. Among the keynote speakers were SK hynix Executive Vice President and Head of NAND Development Jungdal Choi and Sanjay S. Talreja, senior vice president and general manager at US subsidiary Solidigm.

Image 1. SK hynix’s booth at FMS 2022, where attendees could experience the company’s latest products

In their keynote titled “Unlocking the Potential of Data – the New Paradigm of Storage”, the executives explained how innovative NAND technology is addressing the ever-growing need for “DataCosm”, the unique confluence of data, storage, and computing.

Transferring More Data, Faster: The World’s Most Advanced NAND

During the August 2 presentation, Choi unveiled the world’s first 238-layer 512Gb Triple-Level Cell (TLC) 4D NAND with plans to start mass production in the first half of 2023. What makes this latest product stand out is that it is simultaneously the most layered and smallest in area, in turn dramatically improving productivity, data transfer speed, and power efficiency.

Talreja also unveiled the world’s first working Penta-Level Cell (PLC) SSD with the ability to store five bits of data per memory cell, 25% more data in the same footprint compared to quad-level cell (QLC) SSDs. The company is now well-placed to grow in areas including modern workloads such as AI, machine learning and big data analytics; building out of 5G infrastructure and displacing hard disk drives, which still store more than 85% of all data center data.

Image 2. Jungdal Choi and Sanjay S. Talreja share the stage as they deliver their keynote speech

Collaboration for Memory for CXL & Next-Generation Storage

SK hynix’s Head of DRAM Product Planning Uksong Kang and Woosuk Chung, director of Storage SA, also introduced their achievements during technical seminars. During the MemVerge session on August 2, Kang announced development of the company’s first DDR5 DRAM-based Compute Express Link (CXL) samples. The new product redefines memory-as-a-service thanks to CXL memory’s bandwidth/capacity expansion, media differentiation, controller differentiation, and pooling. Kang also stressed the importance of industry collaboration to build CXL memory ecosystem.

Image 3. CXL sample in hand, Uksong Kang introduces the product during his sponsored session

Meanwhile, during his Thursday (August 4) session, Chung demonstrated a next-generation intelligent storage product and the world’s first ordered Key Value Store Computational Storage Device (KV-CSD) that improves write and read capabilities for high performance computing. Developed in partnership with Los Alamos National Laboratory (LANL), the now two-year partnership played an important role in the development of the product, with performance testing performed on LANL’s supercomputer.

Santosh Kumar, director of NAND technical marketing at SK hynix, joined moderator Paul Saffo from Stanford University and executives from other NAND companies in a roundtable discussion “NAND Flash and its Impact on the World” on August 4. The speakers discussed the impact NAND Flash has had on the world over the past 35 years, future applications of NAND Flash and the challenges that memory technologies continue to face.

Image 4. Santosh Kumar (second from the left) participates in the “NAND Flash and its Impact on the World” roundtable discussion

After a successful FMS 2022, SK hynix’s Choi hopes to leverage the momentum to develop more products that push the technology barrier. “We will continue innovations to find breakthroughs in technological challenges,” he said.

The post SK hynix Unlocks NAND Memory Potential with Innovative Products at FMS 2022 first appeared on SK hynix Newsroom.

• World’s first 238-layer 512Gb TLC 4D NAND developed in July; expected to begin mass production in the first half of 2023
• Providing highest, smallest NAND product while remarkably improving productivity, data transfer speed and power efficiency
• “Will continue innovations to find breakthroughs in technological challenges”

SK hynix Inc. (or “the company”, www.skhynix.com) announced today that it has developed the industry’s highest 238-layer NAND Flash product.

The company has recently shipped samples of the 238-layer 512Gb triple level cell (TLC)¹ 4D NAND product to customers with a plan to start mass production in the first half of 2023. “The latest achievement follows development of the 176-layer NAND product in December 2020,” the company stated. “It is notable that the latest 238-layer product is most layered and smallest in area at the same time.”

The company unveiled development of the latest product at the Flash Memory Summit 2022² in Santa Clara. “SK hynix secured global top-tier competitiveness in perspective of cost, performance and quality by introducing the 238-layer product based on its 4D NAND technologies,” said Jungdal Choi, Head of NAND Development at SK hynix in his keynote speech during the event. “We will continue innovations to find breakthroughs in technological challenges.”

Since development of the 96-layer NAND product in 2018, SK hynix has introduced a series of 4D products that outperform existing 3D products. The company has applied charge trap flash³ and peri under cell⁴ technologies to make chips with 4D structures. 4D products have a smaller cell area per unit compared with 3D, leading to higher production efficiency.

The product, while achieving highest layers of 238, is the smallest NAND in size, meaning its overall productivity has increased by 34% compared with the 176-layer NAND, as more chips with higher density per unit area can be produced from each wafer.

The data-transfer speed of the 238-layer product is 2.4Gb per second, a 50% increase from the previous generation. The volume of the energy consumed for data reading has decreased by 21%, an achievement that also meets the company’s ESG commitment.

The 238-layer products will be first adopted for client SSDs which are used as PC storage devices, before being provided for smartphones and high-capacity SSDs for servers later. The company will also introduce 238-layer products in 1 Terabit (Tb) next year, with density doubled compared to the current 512Gb product.

¹Triple Level Cell (TLC): NAND Flash products are categorized into Single Level Cell, Multi Level Cell, Triple Level Cell, Quadruple Level Cell and Penta Level Cell depending on the number of information (unit: bit) contained in a single cell. That a cell contains more information means more data can be stored within the same extent of area.

²Flash Memory Summit (FMS): The world’s biggest conference for NAND Flash industry taking place in Santa Clara every year. During its keynote speech at the event SK hynix made a joint announcement with Solidigm.

³Charge Trap Flash (CTF): Unlike floating gate, which stores electric charges in conductors, CTF stores electric charges in insulators, which eliminates interference between cells, improving read and write performance while reducing cell area per unit compared to floating gate technology.

⁴ Peri. Under Cell (PUC): A technology that maximizes production efficiency by placing peripheral circuits under the cell array.

About SK hynix Inc.

SK hynix Inc., headquartered in Korea, is the world’s top tier semiconductor supplier offering Dynamic Random Access Memory chips (“DRAM”), flash memory chips (“NAND flash”) and CMOS Image Sensors (“CIS”) for a wide range of distinguished customers globally. The Company’s shares are traded on the Korea Exchange, and the Global Depository shares are listed on the Luxembourg Stock Exchange. Further information about SK hynix is available at www.skhynix.com, news.skhynix.com.

Media Contact

SK hynix Inc.
Global Public Relations

Technical Leader
Kanga Kong
E-Mail: global_newsroom@skhynix.com

Technical Leader
Jaehwan Kevin Kim
E-Mail: global_newsroom@skhynix.com

The post SK hynix Develops World’s Highest 238-Layer 4D NAND Flash first appeared on SK hynix Newsroom.