• Industry’s first 321-high NAND of 1Tb developed for supply in 1H25
• “Three Plugs” process technology leads to technological breakthrough for stacking, improves speed, power efficiency
• Company on track to becoming “Full Stack AI Memory Provider” with enhanced competitiveness in AI storage

Seoul, November 21, 2024

SK hynix Inc. (or “the company”, www.skhynix.com) announced today that it has started mass production of the world’s first triple level cell¹-based 321-high 4D NAND Flash with 1Tb capacity.

¹NAND Flash products are categorized into single-, multi-, triple-, quadruple-, and penta-level cells, depending on the number of the information in the format of bit unit is stored in a cell. A bigger number of information stored means more data can be stored in the same space.

Following its previous record as the industry’s first provider of the world’s highest 238-layer NAND since June last year, SK hynix has become the world’s first supplier of the NAND with more than 300 layers by finding a technological breakthrough for stacking. The company plans to provide the 321-high products to customers from the first half of next year.

Stacking more than 300 layers came into reality as the company successfully adopted the “3 plugs²” process technology. Known for an excellent production efficiency, the process electrically connects three plugs through an optimized follow-up process after three times of plug processes are finished. For the process, SK hynix developed a low-stress³ material, while introducing the technology that automatically corrects alignments among the plugs.

²Plug: a vertical hole through layers of substrates aimed at creating cells at once
³Low Stress: Preventing wafer warpage by changing the material into the plugs

With the adoption of the same development platform from the 238-high NAND on the 321-high product, the company could also improve the productivity by 59%, compared with the previous generation, by minimizing any impacts from a process switch.

The latest product comes with an improvement of 12% in data transfer speed and 13% in reading performance, compared with the previous generation. It also enhances data reading power efficiency by more than 10%.

SK hynix plans to steadily expand the use of the 321-high products by providing them to the nascent AI applications, which require low power and high performance.

Jungdal Choi, Head of NAND Development at SK hynix, said that the latest development brings the company a step closer to the leadership of the AI storage market represented by SSD for AI data centers and on-device AI. “SK hynix is on track to advancing to the Full Stack AI Memory Provider by adding a perfect portfolio in the ultra-high performance NAND space on top of the DRAM business led by HBM.”

About SK hynix Inc.

SK hynix Inc., headquartered in Korea, is the world’s top tier semiconductor supplier offering Dynamic Random Access Memory chips (“DRAM”), flash memory chips (“NAND flash”) and CMOS Image Sensors (“CIS”) for a wide range of distinguished customers globally. The Company’s shares are traded on the Korea Exchange, and the Global Depository shares are listed on the Luxembourg Stock Exchange. Further information about SK hynix is available at www.skhynix.com, news.skhynix.com.

Media Contact

SK hynix Inc.
Global Public Relations

Technical Leader
Kanga Kong
E-Mail: global_newsroom@skhynix.com

Technical Leader
Sooyeon Lee
E-Mail: global_newsroom@skhynix.com

The post SK hynix Starts Mass Production of World’s First 321-High NAND first appeared on SK hynix Newsroom.

SK hynix’s executive team just got younger. As part of efforts to foster young leadership, Lee Donghun was appointed to the N-S Committee¹ at the end of 2023 to become SK hynix’s youngest-ever executive.

¹N-S Committee: SK hynix’s strategic unit formed at the beginning of 2024 that fortifies its NAND flash and solution businesses.

Born in 1983, Lee is a young talent who finished his master’s and doctoral studies after participating in SK hynix’s scholarship program in 2006. He joined the company in 2011 and played a key role in the development and evolution of 4D NAND. Lee led the Technological Strategy team for the 128- and 176-layer NAND flash before working as the head of the Performance and Reliability (PnR) team for the 238-layer NAND flash, contributing significantly to establishing SK hynix’s 4D NAND as the industry standard.

As part of the newsroom’s interview series with newly appointed executives, Lee spoke about the future of NAND flash development and his aspirations as a leader.

Flexibility is Crucial in Times of Change

Lee anticipates reaching new heights in NAND flash technology by adopting a flexible approach

Lee emphasized the importance of rapid and flexible responses to the rapidly changing technological landscape following the advent of the AI era.

“Advances in technology are rapidly changing people’s lives, so responding to these changes will be critical for companies’ future,” he said. “A good comparison is the emergence and subsequent impact of the internet and smartphones.”

The N-S Committee is an example of SK hynix’s response to lead this changed business environment. As generative AI and other applications need to store ever-growing amounts of data, NAND flash requires assistance from NAND solutions. Accordingly, the N-S Committee will act as a control tower to optimize the NAND flash and NAND solution businesses simultaneously and strengthen the company’s competitiveness by increasing development efficiency and customer satisfaction.

“In order to respond flexibly when new technologies emerge, all related divisions need to constantly share information and collaborate,” Lee said. “Consequently, collaboration between the NAND flash and NAND solutions developments is not optional but necessary if we want to speed up the process of developing products desired by our customers. As a new executive, I plan to make such collaborations even more efficient.”

Beyond 4D NAND: The NAND Flash Revolution in the AI Era

Lee believes that further development in NAND flash technology holds the key to leading the AI era

Lee expressed his excitement about working on the world’s highest 321-layer 4D NAND to ensure the product’s performance, reliability, and quality.

“The 321-layer 4D NAND we’re developing is set to be a new milestone in the industry with its superior performance, and that’s why our role is so important,” Lee said. “For this product, it’s not just about performance, it’s also about ensuring reliability. If we focus only on rapidly increasing demand, there are potential risks to quality and reliability. Our short-term goal is to finish development and deliver products as quickly as possible while minimizing risks.”

Lee stressed that, in the long run, the company needs to continue innovating by taking on new challenges.

“Until now, the key to NAND flash development has been to improve cost-effectiveness,” he said. “That’s why we’ve seen 2D and 3D NAND in the past, followed by 4D NAND. Now that we’re in the midst of a transformation, NAND needs to innovate in multiple directions.”

Lee also emphasized the need to focus on the data explosion expected across various fields.

“As the number of sectors utilizing AI technology expands, there will also be an increase in data generation,” Lee explained. “In the automotive space alone, data related to roads and traffic for autonomous driving is rapidly growing. Depending on the type of device or environment which generates data, the standards and conditions required from NAND flash products may evolve drastically. It will be my job to anticipate these changes in the industry and lead proactive innovations, ensuring SK hynix continues its technological leadership.”

Building Empathy With Employees Pivotal in Overcoming Challenges

Lee sees team effort as the answer to overcoming unexpected challenges

Lee also sees tailwinds blowing in the semiconductor industry today as he predicts that NAND flash, like DRAM, will go on an upward direction in 2024. However, he predicted that there will be vast innovations in various technological fields that will create more challenges for SK hynix employees.

“In the midst of so many challenges, it is important that our members understand why we need to overcome these obstacles while finding the right motivation to continue progressing,” he said. “At the end of the day, the company and its people need to be on the same page to achieve a common goal.”

Even in his New Year’s greeting to his team members, Lee emphasized the need to pay attention to pivotal changes in the technological space and flexibly respond to situations.

“The semiconductor memory market is on the upswing in 2024, and I think we can greet this upturn with a smile as we faced a lot of adversity. However, there are still challenges ahead,” Lee explained. “Especially as we are expecting the launch of next-generation NAND flash products this year, I will do my best to help the company navigate this period of drastic transformation. We hope to accomplish various goals in 2024.”

<Other articles from this series>

New Leadership Spotlight: SK hynix’s First Female Research Fellow, Vice President Oh Haesoon, on Advancing NAND Flash

New Leadership Spotlight: Vice President Kitae Kim, Head of HBM Sales & Marketing, on Future-Proofing HBM’s Market Leadership

New Leadership Spotlight: Vice President Hoyoung Son Targets SK hynix’s Evolution Into Total AI Memory Provider Through Advanced Packaging Tech

Leadership Spotlight: Deoksin Kil, Head of Material Development, On Achieving Tech Innovation Through Advanced Materials

New Leadership Spotlight: Head of HBM PI Unoh Kwon Aims to Finish SK hynix’s HBM Roadmap & Lead in the AI Era

New Leadership Spotlight: Global RTC Head Jaeyun Yi Aims to Present a New Paradigm for the Future of Semiconductors

New Leadership Spotlight: SK hynix Execs Join Roundtable to Discuss Company’s AI Memory Leadership & Future Market Trends

The post New Leadership Spotlight: SK hynix’s Youngest Exec, Lee Donghun, Discusses Spearheading NAND Flash Development first appeared on SK hynix Newsroom.

This final episode in the Tech Pathfinder series will introduce SK hynix’s advanced 4D NAND technologies. These include its 4D^1.0 technologies, which specialize in stacking and performance improvement such as the Cost-Effective 3-Plug formation, Sideway Source, All Peri.¹ Under Cell (PUC), and Advanced Charge Trap Flash (CTF). It will also cover the 4D^2.0 NAND technologies which overcome the limitations of stacking, such as Multi-Site Cell (MSC).

¹Peripheral circuit (peri.): A circuit that controls the cell.

The Basics of NAND Flash Memory

For a better understanding of 4D NAND technology, it is prudent to review NAND’s basic concepts and related terminology.

Figure 1. An overview of different types of NAND flash memory

A cell is the smallest unit in which information is stored. In NAND flash memory, the cells consist of a control gate and a floating gate. When voltage is applied to the control gate, electrons traveling through the pathway are stored in the floating gate. NAND flash stores data by categorizing cells as either 0 or 1 using electrons stored on the floating gate. This state is characterized by the number of electrons in a cell. For example, a cell with few electrons is read as 0, while a cell with a high number of electrons is interpreted as 1.

NAND flash memory is categorized into different types depending on how much information (bits) is stored in a single cell. These include single-level cell (SLC, 1 bit), multi-level cell (MLC, 2 bits), triple-level cell (TLC, 3 bits), quad-level cell (QLC, 4 bits), and penta-level cell (PLC, 5 bits). As for the units used to measure NAND flash memory capacity, these include references to giga (a billion) and tera (a trillion). In other words, a TLC NAND flash product with a capacity of 1 Tb has about 330 billion cells that store 3 bits each.

4D^1.0 Technology: Reducing Chip Size Through Cell Stacking

There are four main 4D^1.0 NAND technologies SK hynix has employed to develop high-capacity NAND flash solutions.

Figure 2. An overview of the Cost-Effective 3-Plug formation and Sideway Source

Cost-Effective 3-Plug Formation

One of the key goals of developing semiconductor technology is improving cost efficiency. This is achieved by stacking more cells to reduce the chip size and producing as many chips as possible on a single wafer. Stacking substrates layer-by-layer and repeating the cell formation process for each layer would be inefficient and increase manufacturing costs. Therefore, multiple layers of substrate are first stacked, then vertical holes called plugs are drilled through the layers before cells are formed next to the holes.

As the number of layers increases, the more challenging it becomes to form plugs to the bottom layer as existing etching equipment can only etch around 100 layers at a time. Therefore, to develop a NAND flash product with more than 300 layers, it is necessary to stack 100 layers and perform the plug etching process three times. This is where SK hynix’s Cost-Effective 3-Plug formation is used as all the processes, including cell formation, can be performed simultaneously on all layers.

With this, SK hynix was able to conduct a single process to simultaneously fabricate the key structures—word lines² and word line staircases³—that apply voltage and the passageways for electrons. This enabled the company to unveil a 321-layer 4D NAND of the highest density in August 2023 while minimizing costs.

²Word lines: The structure that binds the control gate of each layer of NAND cells.
³Word line staircases: A staircase-like structure for exposing the word line of each layer to the top surface.

Sideway Source

Semiconductor plugs provide a pathway for electrons to travel. Inside a plug, this pathway is covered by CTF film⁴. Therefore, the CTF film needs to be removed at the connection point where the plug and the bottom of the NAND flash layer meet to connect two pathways. Sideway source connects the plug to the bottom of the NAND flash layer (channel and source line⁵). Previously, etching gas was injected from the top of the plug to vertically remove the CTF film at the bottom of the plug. However, when stacking two or more plugs, the centers of the plugs were not aligned. This prevented the etching gas from reaching the bottom, damaging the CTF film on the side of the plug that serves as a cell.

⁴CTF film: A composite of oxide and nitride films that replaces the floating gate.
⁵Source line: Located at the bottom of a NAND layer, the source line is part of a channel inside the plug. Electrons from the source line travel up the channel to the top of the NAND layer and are stored in their respective floating gates.

SK hynix solved this issue by replacing the vertical connection with a horizontal one. The etching gas is injected into a separate pathway to reach the bottom of the NAND layer and remove the CTF film on both sides of the plug.

With Sideway Source technology, the etching gas is not directly injected into the plug. Therefore, even if the plugs are misaligned, the interior remains undamaged. As a result, SK hynix has significantly reduced its defect rate, increased productivity, and addressed the problem of increased costs associated with multiple stacking.

Since SK hynix introduced the industry’s first 4D NAND in 2018, it has enhanced its expertise to produce precise horizontal pathway connections which leave no voids at the bottom of the NAND layer. Based on this advancement, the company improved production efficiency by 34% for its 238-layer NAND flash memory compared to the 176-layer product and further solidified its market leadership with its 321-layer NAND.

Figure 3. An overview of All Peri. Under Cell (PUC)

All Peri. Under Cell (PUC)

PUC reduces the chip size and increases the number of stacks by placing the peripheral circuit (peri.) under the cell. SK hynix used PUC to develop a new NAND flash structure, the world’s first 4D NAND, and then began product development. The company has further developed upon PUC with its All PUC technology, which miniaturizes the peri. so it becomes the same size as the cell or smaller to accommodate the reduced cell size. To advance the technology, SK hynix is further miniaturizing the peri. by reducing the size and number of transistors and fully placing the peri. in the empty space under the cell.

In particular, this technology was used for the first time to great effect in SK hynix’s 238-layer 512 Gb TLC NAND. For this solution, the company reduced the size of the chip and peri. by more than 30% compared to the previous generation, thus improving production efficiency and cost competitiveness. SK hynix will continue to enhance its expertise and perfect the technology so it can be applied to future products that require a smaller peri. and chips.

Figure 4. An overview of Advanced Charge Trap Flash (CTF)

Advanced Charge Trap Flash (CTF)

Advanced CTF minimizes data degradation by retaining more electrons than conventional CTF. In CTF, electrons are stored in nonconductors rather than in conductors such as a floating gate. CTF was therefore developed in part to address inter-cell interference⁶ in conductors by changing the electron storage space to nonconductors. However, electrons often escape from nonconductors as they are stored in the voids of the CTF material (nitrogen-silicon compound) which has unstable areas. When electrons are stored in these unstable areas, the bonds quickly break and the electrons are ejected, resulting in data loss.

⁶Inter-cell interference: Electrons in a cell are affected by electrons in adjacent cells due to device miniaturization, resulting in data corruption.

For its Advanced CTF, SK hynix fills the unstable areas with hydrogen to prevent electrons from entering, and increases the number of binding agents to store more electrons. Furthermore,  Advanced CTF also increases the number of electrons stored in CTF by minimizing the risk of escaped electrons. This improves the ability to determine electron counts, reduces read errors, and significantly shortens latency.

Some types of NAND flash have difficulties distinguishing data when there are a low number of electrons, resulting in errors. For example, if SLC flash memory distinguishes data using ten electrons, data with one to five electrons is 0, and data with six to ten electrons is 1. However, if five electrons escape, the data previously processed as 1 is distorted and an error occurs. This problem worsens as a cell is segmented to the MLC level and higher.

TLC differentiates between eight states from 000 to 111. If there are 10 electrons to distinguish, each state is assigned either one or two electrons. This is a significant difference from SLC, which allocates five electrons per state. Consequently, even if only a few electrons escape, it can lead to data corruption.

In contrast, consider a situation in which Advanced CTF was used to distinguish data with 100 electrons. If the number of electrons is between 0 and 50, the data is read as 0, while if it is between 51 and 100, it is 1. Even if some electrons escape, the large number of electrons overall greatly reduces the chance of misreading the data. Since there are few errors, the latency is shortened, and the read speed increases.

SK hynix first applied Advanced CTF to its 176-layer NAND solution, resulting in a 25% improvement in the ability to determine electron counts. As Advanced CTF-based memory solutions offer lower latency, they are particularly suited for the gaming and automotive markets which require rapid data processing.

4D^2.0 Technology: Increasing Horizontal Cell Density & Stacking for Enhanced Performance & Density

When developing semiconductor memory, manufacturing costs continue to rise with each additional layer. Taking into account the additional cost of increasing the number of bits beyond the TLC level, there comes a point where it is no longer possible to reduce costs. In response, SK hynix is developing 4D^2.0 technology which increases the number of layers and horizontal density of cells to improve storage capacity relative to cost. Multi-Site Cell (MSC) is a 4D^2.0 technology that structurally improves the horizontal density, thereby significantly increasing the number of bits.

Figure 5. An overview of Multi-Site Cell (MSC)

Multi-Site Cell (MSC)

There are two primary methods for horizontally expanding cell density. The first is multi-level cell (MLC) technology, which subdivides electron counts to accommodate more data (bits) in a single cell. This is the case with NAND flash types ranging from SLC to QLC. The second is MSC technology, which structurally increases the sites where electrons are stored in a cell, enabling it to hold more data (bits).

MLC technology has been commercialized in 4-bit QLC products, but it is challenging to maintain performance and reliability in 5-bit PLC and beyond. This is due to the previously mentioned limitations in determining electron counts.

For example, if you build a 6-bit hexa-level cell (HLC) with MLC, you need to store data in 64 different states ranging from 000000 to 111111. This is prone to errors and time-consuming because there are not enough electrons to distinguish each state. Compared to the 4-bit QLC, the ability to determine the number of electrons is four times poorer.

On the other hand, when developing an HLC with MSC, eight states from 000 to 111 are created in two spaces and multiplied to realize 64 states to store data. Compared to the 4-bit QLC, the ability to distinguish electron counts doubles. In other words, it has the capacity of an HLC but the speed of a TLC. SK hynix has confirmed a 20-fold improvement⁷ in read and write speeds when utilizing MSC. Due to MSC’s high capacity, rapid speed, and reliability, SK hynix’s NAND flash is the leading solution for future multimodal AI⁸.

⁷Comparison between a 5-bit regular cell and a 2.5-bit × 2.5-bit MSC
⁸Multimodal AI: AI that can simultaneously process text, speech, images, etc.

Solving Industry Problems With An Eye on the Future

In this final Tech Pathfinder episode, SK hynix’s 4D NAND technologies were shown to solve the industry issues of today and tomorrow. The company’s 4D^1.0 technologies improve the cost-effectiveness and performance of its NAND flash, while its 4D^2.0 technologies will overcome stacking limitations set to arise in the future.

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[Tech Pathfinder] HKMG Opens the Door to Leading Mobile DRAM LPDDR5X & LPDDR5T

[Tech Pathfinder] Small Size, Big Impact: Unveiling the Latest Advances in Semiconductor Packaging and Miniaturization

The post [Tech Pathfinder] How SK hynix’s Advanced 4D NAND Technologies Are Overcoming Stacking Limitations first appeared on SK hynix Newsroom.

Figure 1. SK hynix’s booth at FMS 2023 featured some of the company’s latest products and technologies

As the world’s largest memory and storage trade show, the annual Flash Memory Summit (FMS) is renowned for exhibiting revolutionary high-speed memory and SSD products. At FMS 2023 held August 8^th-10^th at the Santa Clara Convention Center in California, SK hynix continued this legacy of innovation by showcasing groundbreaking memory solutions under the slogan “United Through Technology”. During the event, executives from SK hynix gave a keynote speech to share the companies’ developments in the memory sector.

Leading 4D NAND Solutions Key to the Multimodal AI Era

Figure 2. SK hynix’s EVP and Head of NAND development Jungdal Choi and EVP and Head of Solution Development Hyun Ahn during their keynote speech

On August 8^th, SK hynix’s EVP and Head of NAND development Jungdal Choi along with EVP and Head of Solution Development Hyun Ahn gave a keynote speech titled “Industry-Leading 4D NAND Technology and Solutions Enabling the Multimodal AI¹ Era”.

¹Multimodal AI: Combines various data types (image, text, speech, numerical data, etc.) with multiple intelligence processing algorithms to achieve higher performance levels.

Choi revealed that the company is currently developing the world’s first 321-layer NAND product, the fifth generation of 4D NAND. Choi said that the new product, which is the first in the industry to exceed 300 layers, is set to help the company solidify its technological leadership in NAND. Meanwhile, Ahn introduced the company’s ultra-high performance UFS 4.0 and PCIe 5^th generation (Gen5) SSD products for use in data centers and PCs. The continuous development of SSD products is essential as they are set to become an essential storage solution for application with multimodal AI, which analyzes and calculates vast amounts of data on various platforms. The pair concluded by stating that SK hynix is committed to supporting multimodal AI and other advanced technologies by developing next-generation PCIe Gen6 SSDs and UFS 5.0 memory-based products.

Breaking Barriers: Unveiling Pioneering 4D NAND & SSD Solutions

Figure 3. SK hynix’s product line-up, including its 4D NAND solutions, were on display

SK hynix is continually looking to advance its 4D NAND technology in terms of performance and reliability. The company’s development of the industry’s first 96-layer 4D NAND based on charge trap flash² (CTF) in 2018 became a launchpad for further innovations, leading to the development of its 238-layer 4D NAND four years later in another industry first. Continuing this line of industry firsts, SK hynix showcased samples of its 321-layer 1 Tb 4D NAND, which offers a 59% improvement in productivity compared with the previous generation 238-layer, 512 Gb NAND chips. This improvement was realized by technological developments that enabled the stacking of more cells and a larger storage capacity on a single chip, thereby increasing the total capacity of a single wafer.

The groundbreaking 321-layer NAND product was later presented at SK hynix’s booth along with other NAND solutions, including the company’s PCle³ Gen5 enterprise SSD (eSSD) called PS1030 which utilizes V7 NAND. The PS1030, which was applied to a supermicro server for the demonstration, delivers the fastest sequential read speed in the industry—14,800 MB/s. It also offers a random read performance of 3,300 kIOPS⁴, highlighting its specifications as a high-performance eSSD.

²Charge trap flash (CTF): Unlike floating gate, which stores electric charges in conductors, CTF stores electric charges in insulators, which eliminates interference between cells, improving read and write performance while reducing cell area per unit compared to floating gate technology.

³Peripheral Component Interconnect Express (PCle): A serial-structured, high-speed input/output interface used on the motherboard of digital devices.

⁴Thousand Input/Output Operations Per Second (kIOPS): A measure of how many read and write operations a storage device can perform in a second.

Visitors to the SK hynix booth could also see another one of the company’s SSDs, the PCIe Gen4 PC811.  Applied to a PC for the demonstration, the PC811 is SK hynix’s first V8 NAND-based mainstream client SSD (cSSD). Other SSDs on show included its high-speed Platinum P41, ultra-low power Gold P31, and the company’s first portable SSD for consumers, SK hynix Beetle X31.

Unleashing the Power of HPC With KV-CSD

Figure 4. SK hynix’s Woosuk Chung, team leader for the Computational Storage department, held a session on KV-CSD, which was also displayed at the company’s booth

SK hynix also held the second demonstrations of its pioneering Key Value Store Computational Storage Device (KV-CSD) following on from its debut at last year’s FMS. Co-developed with U.S.-based Los Alamos National Laboratory (LANL), the KV-CSD is a next-generation intelligent storage product which improves write and read capabilities for high performance computing (HPC).

The impact of the KV-CSD was discussed in a session on August 10^th by SK hynix’s Woosuk Chung, team leader for the Computational Storage department. Titled “Architecture of a Query Accelerating KV-CSD in a HPC System”, the talk revealed how the new KV-CSD overcomes the limitations of software key-value stores.

High-Performance Mobile and Automotive Solutions

Figure 5. SK hynix’s mobile and automotive solutions

SK hynix also exhibited its technologies for the mobile and automotive sectors at FMS 2023. The company’s line-up of V7 512 Gb universal flash storage⁵ (UFS) products was on display, including those based on UFS 2.2, UFS 3.1, and UFS 4.0—the latest specification which offers enhanced bandwidth speed and efficiency. Additionally, the company’s universal multichip package⁶ (uMCP), which combines its mobile DRAM LPDDR and UFS, was also presented at the booth.

Moving to solutions for the automotive market, SK hynix’s LPDDR5X mobile DRAM and HBM2E DRAM were among the products displayed as they are essential components of Advanced Driver Assistance Systems (ADAS)⁷. The HBM2E highlights SK hynix’s strength in the automotive sector as it is the only company to develop HBM products specifically for the industry. As well as ADAS, SK hynix’s automotive solutions support other functions. For example, its eMMC 5.1 embedded multimedia card is utilized for in-car connectivity, while its UFS 3.1-based and SSD products are applied for in-vehicle infotainment and storage, respectively.

⁵Universal Flash Storage (UFS): A breakthrough type of flash memory that can simultaneously read and write data. Due to its low-power consumption, high-performance and reliability, UFS is widely applied in mobile devices.

⁶Universal multichip package (uMCP): A multi-chip package that combines DRAM and NAND flash into one product.

⁷Advanced Driver Assistance Systems (ADAS): A system that utilizes various technologies to help drivers in routine navigation and parking without fully automating the process.

Never Standing Still

SK hynix always has one eye on the future, and this was exemplified during its successful time at FMS 2023. Despite already offering a range of industry-leading solutions, the company will not rest on its laurels as it aims to further improve it line-up of NAND and other high-performance memories in the future.

The post FMS 2023: SK hynix Showcases World’s First 321-Layer NAND Samples & Storage Solutions first appeared on SK hynix Newsroom.

• SK hynix unveils development progress of world’s first NAND with more than 300 layers at FMS 2023
• Next-generation NAND solutions such as PCIe 5th Gen, UFS 4.0 also unveiled
• “Innovation to continue for development of high-performance NAND for AI era”

Seoul, August 9, 2023

SK hynix Inc. (or “the company”, www.skhynix.com) showcased today the sample of the 321-layer 4D NAND, making public the progress on its development of the industry’s first NAND with more than 300 layers.

The company gave a presentation on the progress on the development of its 321-layer 1Tb TLC¹ 4D NAND Flash and displayed the samples at the Flash Memory Summit (FMS) 2023² taking place Aug. 8-10 in Santa Clara.

¹Triple Level Cell (TLC): NAND Flash products are categorized into single, multi, triple, quadruple and penta level cells depending on the number of information (in bit unit) contained in a single cell. That a cell contains more information means more data can be stored within the same extent of area.

²Flash Memory Summit (FMS): the biggest annual conference for NAND Flash industry

SK hynix is the first in the industry to unveil the progress on the development of a NAND with more than 300 layers in detail. The company plans to raise the level of completion of the 321-layer product and start mass production from the first half of 2025.

The company said its technological competitiveness accumulated from the success of the world’s highest 238-layer NAND, already in mass production, paved the way for a smooth progress for the development of the 321-layer product. “With another breakthrough to address stacking limitations, SK hynix will open the era of NAND with more than 300 layers and lead the market.”

The 321-layer 1Tb TLC NAND comes with a 59% improvement in productivity, compared with the earlier generation of 238-layer 512Gb, thanks to the technology development that enabled stacking of more cells and larger storage capacity on a single chip, meaning the total capacity that can be produced on a single wafer increased.

Since the introduction of ChatGPT that accelerated the growth of the generative AI market, demand for high-performance and high-capacity memory products that can process more data at a faster pace is growing rapidly.

Accordingly, at the FMS, SK hynix also introduced next-generation NAND solutions optimized for such AI demand, including the enterprise SSD adopting the PCIe Gen5 interface and UFS 4.0.

The company expects these products to achieve industry-leading performance to fully meet the needs of the customers with a focus on high performance.

SK hynix also announced that it has started development of the next-generation PCIe Gen6 and UFS 5.0 with the improved technology for solution development that it acquired through these products and expressed its commitment to leading the industry trend.

Jungdal Choi, Head of NAND Development, said during a keynote speech that the company expects the ongoing development of the 321-layer product, the fifth generation of the 4D NAND, to help the company solidify its technological leadership in the NAND space. “With timely introduction of the high-performance and high-capacity NAND, we will strive to meet the requirements of the AI era and continue to lead innovation.”

About SK hynix Inc.

SK hynix Inc., headquartered in Korea, is the world’s top tier semiconductor supplier offering Dynamic Random Access Memory chips (“DRAM”), flash memory chips (“NAND flash”) and CMOS Image Sensors (“CIS”) for a wide range of distinguished customers globally. The Company’s shares are traded on the Korea Exchange, and the Global Depository shares are listed on the Luxembourg Stock Exchange. Further information about SK hynix is available at www.skhynix.com, news.skhynix.com.

Media Contact

SK hynix Inc.
Global Public Relations

Technical Leader
Kanga Kong
E-Mail: global_newsroom@skhynix.com

Technical Leader
Joori Roh
E-Mail: global_newsroom@skhynix.com

The post SK hynix Showcases Samples of World’s First 321-Layer NAND first appeared on SK hynix Newsroom.

• Product compatibility test with global smartphone manufacturer underway
• Secures top-notch competitiveness in price, quality for NAND product
• Expects NAND technology competitiveness to drive earnings rebound in 2H

Seoul, June 8, 2023

SK hynix Inc. (or “the company”, www.skhynix.com) announced today that it has started mass production of its 238-layer 4D NAND Flash memory, following the development in August 2022, and that product compatibility test with a global smartphone manufacturer is underway.

“SK hynix has developed solution products for smartphones and client SSDs which are used as PC storage devices, adopting the 238-layer NAND technology, and has moved into mass production in May,” the company said. “Given that the company secured world-class competitiveness in price, performance and quality for both 238-layer NAND and the previous generation 176-layer NAND, we expect these products to drive earnings improvement in the second half of the year.”

The 238-layer product – the smallest NAND in size – has a 34% higher manufacturing efficiency compared to the previous generation of 176-layer, resulting in a significant improvement in cost competitiveness.

Besides, with a data-transfer speed of 2.4Gb per second, a 50% increase from the previous generation, and approximately 20% increase in read and write speed, the company is confident that it will be able to deliver an improved performance to the smartphone and PC customers using this technology.

Once the product compatibility test with the global smartphone manufacturer is completed, SK hynix will begin supplying the 238-layer NAND product for smartphones, and expand the technology across its product portfolio such as PCIe 5.0^* SSDs and high-capacity server SSDs going forward.

^*PCIe 5.0: PCIe(Peripheral Component Interconnect Express) is a serial-structured high-speed input/output interface used in the main boards of digital devices, with PCIe 5.0 doubling the data rate to 32GT/s(Gigatransfer per second) from PCIe 4.0

“We will continue to overcome NAND technology limitations and increase our competitiveness so that we can achieve a bigger turnaround than anyone else during the upcoming market rebound,” said Jumsoo Kim, Head of S238 NAND at SK hynix.

About SK hynix Inc.

SK hynix Inc., headquartered in Korea, is the world’s top tier semiconductor supplier offering Dynamic Random Access Memory chips (“DRAM”), flash memory chips (“NAND flash”) and CMOS Image Sensors (“CIS”) for a wide range of distinguished customers globally. The Company’s shares are traded on the Korea Exchange, and the Global Depository shares are listed on the Luxembourg Stock Exchange. Further information about SK hynix is available at www.skhynix.com, news.skhynix.com.

Media Contact

SK hynix Inc.
Global Public Relations

Technical Leader
Joori Roh
E-Mail: global_newsroom@skhynix.com

Technical Leader
Kanga Kong
E-Mail: global_newsroom@skhynix.com

The post SK hynix Begins Mass Production of Industry’s Highest 238-Layer 4D NAND first appeared on SK hynix Newsroom.

SK hynix joined the August 2-4 event at the Santa Clara Convention Center in California, the first in-person FMS since 2019. In the event’s keynote and other sessions, company executives and project leaders discussed new products and the challenges that went into their development. Among the keynote speakers were SK hynix Executive Vice President and Head of NAND Development Jungdal Choi and Sanjay S. Talreja, senior vice president and general manager at US subsidiary Solidigm.

Image 1. SK hynix’s booth at FMS 2022, where attendees could experience the company’s latest products

In their keynote titled “Unlocking the Potential of Data – the New Paradigm of Storage”, the executives explained how innovative NAND technology is addressing the ever-growing need for “DataCosm”, the unique confluence of data, storage, and computing.

Transferring More Data, Faster: The World’s Most Advanced NAND

During the August 2 presentation, Choi unveiled the world’s first 238-layer 512Gb Triple-Level Cell (TLC) 4D NAND with plans to start mass production in the first half of 2023. What makes this latest product stand out is that it is simultaneously the most layered and smallest in area, in turn dramatically improving productivity, data transfer speed, and power efficiency.

Talreja also unveiled the world’s first working Penta-Level Cell (PLC) SSD with the ability to store five bits of data per memory cell, 25% more data in the same footprint compared to quad-level cell (QLC) SSDs. The company is now well-placed to grow in areas including modern workloads such as AI, machine learning and big data analytics; building out of 5G infrastructure and displacing hard disk drives, which still store more than 85% of all data center data.

Image 2. Jungdal Choi and Sanjay S. Talreja share the stage as they deliver their keynote speech

Collaboration for Memory for CXL & Next-Generation Storage

SK hynix’s Head of DRAM Product Planning Uksong Kang and Woosuk Chung, director of Storage SA, also introduced their achievements during technical seminars. During the MemVerge session on August 2, Kang announced development of the company’s first DDR5 DRAM-based Compute Express Link (CXL) samples. The new product redefines memory-as-a-service thanks to CXL memory’s bandwidth/capacity expansion, media differentiation, controller differentiation, and pooling. Kang also stressed the importance of industry collaboration to build CXL memory ecosystem.

Image 3. CXL sample in hand, Uksong Kang introduces the product during his sponsored session

Meanwhile, during his Thursday (August 4) session, Chung demonstrated a next-generation intelligent storage product and the world’s first ordered Key Value Store Computational Storage Device (KV-CSD) that improves write and read capabilities for high performance computing. Developed in partnership with Los Alamos National Laboratory (LANL), the now two-year partnership played an important role in the development of the product, with performance testing performed on LANL’s supercomputer.

Santosh Kumar, director of NAND technical marketing at SK hynix, joined moderator Paul Saffo from Stanford University and executives from other NAND companies in a roundtable discussion “NAND Flash and its Impact on the World” on August 4. The speakers discussed the impact NAND Flash has had on the world over the past 35 years, future applications of NAND Flash and the challenges that memory technologies continue to face.

Image 4. Santosh Kumar (second from the left) participates in the “NAND Flash and its Impact on the World” roundtable discussion

After a successful FMS 2022, SK hynix’s Choi hopes to leverage the momentum to develop more products that push the technology barrier. “We will continue innovations to find breakthroughs in technological challenges,” he said.

The post SK hynix Unlocks NAND Memory Potential with Innovative Products at FMS 2022 first appeared on SK hynix Newsroom.

• World’s first 238-layer 512Gb TLC 4D NAND developed in July; expected to begin mass production in the first half of 2023
• Providing highest, smallest NAND product while remarkably improving productivity, data transfer speed and power efficiency
• “Will continue innovations to find breakthroughs in technological challenges”

SK hynix Inc. (or “the company”, www.skhynix.com) announced today that it has developed the industry’s highest 238-layer NAND Flash product.

The company has recently shipped samples of the 238-layer 512Gb triple level cell (TLC)¹ 4D NAND product to customers with a plan to start mass production in the first half of 2023. “The latest achievement follows development of the 176-layer NAND product in December 2020,” the company stated. “It is notable that the latest 238-layer product is most layered and smallest in area at the same time.”

The company unveiled development of the latest product at the Flash Memory Summit 2022² in Santa Clara. “SK hynix secured global top-tier competitiveness in perspective of cost, performance and quality by introducing the 238-layer product based on its 4D NAND technologies,” said Jungdal Choi, Head of NAND Development at SK hynix in his keynote speech during the event. “We will continue innovations to find breakthroughs in technological challenges.”

Since development of the 96-layer NAND product in 2018, SK hynix has introduced a series of 4D products that outperform existing 3D products. The company has applied charge trap flash³ and peri under cell⁴ technologies to make chips with 4D structures. 4D products have a smaller cell area per unit compared with 3D, leading to higher production efficiency.

The product, while achieving highest layers of 238, is the smallest NAND in size, meaning its overall productivity has increased by 34% compared with the 176-layer NAND, as more chips with higher density per unit area can be produced from each wafer.

The data-transfer speed of the 238-layer product is 2.4Gb per second, a 50% increase from the previous generation. The volume of the energy consumed for data reading has decreased by 21%, an achievement that also meets the company’s ESG commitment.

The 238-layer products will be first adopted for client SSDs which are used as PC storage devices, before being provided for smartphones and high-capacity SSDs for servers later. The company will also introduce 238-layer products in 1 Terabit (Tb) next year, with density doubled compared to the current 512Gb product.

¹Triple Level Cell (TLC): NAND Flash products are categorized into Single Level Cell, Multi Level Cell, Triple Level Cell, Quadruple Level Cell and Penta Level Cell depending on the number of information (unit: bit) contained in a single cell. That a cell contains more information means more data can be stored within the same extent of area.

²Flash Memory Summit (FMS): The world’s biggest conference for NAND Flash industry taking place in Santa Clara every year. During its keynote speech at the event SK hynix made a joint announcement with Solidigm.

³Charge Trap Flash (CTF): Unlike floating gate, which stores electric charges in conductors, CTF stores electric charges in insulators, which eliminates interference between cells, improving read and write performance while reducing cell area per unit compared to floating gate technology.

⁴ Peri. Under Cell (PUC): A technology that maximizes production efficiency by placing peripheral circuits under the cell array.

About SK hynix Inc.

SK hynix Inc., headquartered in Korea, is the world’s top tier semiconductor supplier offering Dynamic Random Access Memory chips (“DRAM”), flash memory chips (“NAND flash”) and CMOS Image Sensors (“CIS”) for a wide range of distinguished customers globally. The Company’s shares are traded on the Korea Exchange, and the Global Depository shares are listed on the Luxembourg Stock Exchange. Further information about SK hynix is available at www.skhynix.com, news.skhynix.com.

Media Contact

SK hynix Inc.
Global Public Relations

Technical Leader
Kanga Kong
E-Mail: global_newsroom@skhynix.com

Technical Leader
Jaehwan Kevin Kim
E-Mail: global_newsroom@skhynix.com

The post SK hynix Develops World’s Highest 238-Layer 4D NAND Flash first appeared on SK hynix Newsroom.

The NAND market is showing a global expansion, along with the growth of the gaming industry and data centers. With the increase of remote working and online classes due to the COVID-19 outbreak, the demand for data centers and cloud servers has recently surged, which has led to an increase in demand for NAND memory. As the application fields and usage environments of NAND flash are becoming more diversified — from mobile and portable SSDs, to data centers, to enterprise SSDs and automotive — various requirements are emerging. Some common requirements are a higher write and read speed, maximized storage capacity, lower power consumption, and lower cost. To satisfy these requirements, the evolution of data storage methods and stacking methods is continuing.

Methods of NAND Flash Data Storage

NAND flash is a memory device that stores information by trapping electrons or holes in the trap site inside the silicon nitride. In this device, the current flows through the channel created by forming an active area and a gate on the surface of a Si wafer. Program (“1”) and erase (“0”) information is stored according to the type of charge stored in the floating gate. In the meantime, the operation of storing 1 bit in one cell is called a single-level cell (SLC). The number of electrons trapped inside the silicon nitride is proportional to the threshold voltage of the cell transistor. Therefore, when trapping a large number of electrons, a high threshold voltage is achieved. Likewise, trapping a small number of electrons results in a low threshold voltage.

You can identify the amount of trapped electrons by dividing the amount of trapped electrons into three and applying the intermediate voltage of each to the cell gate to check if the current flows. In that case, there exist four states, including the erase state: this is 2 bit-multi-level cell (2 bit-MLC). These four states of 2 bit-MLC can be described as “11”, “10”, “01”, and “00”, and each cell can store 2 bits of information. MLC refers to a state where a cell has a multi-level of 2 bits or more in a dictionary sense, however, it will be used as a counterpart to SLC in this article. MLC that stores 2 bits of information can be called 2 bit-MLC here for convenience.

By adopting the same method, when an eight-cell state is created and 3 bits of information are stored, this state is called triple-level cell (TLC). Likewise, when a 16-cell state is created and 4 bits of information are stored, it is called quadruple-level cell (QLC). When the cell state is denser, more information can be stored in one cell. For example, when comparing to an SLC NAND flash, a QLC NAND flash is capable of storing the same amount of information in a chip size which is 67.5% smaller; however, more program and read operations are required to increase the density in the cell state. Accordingly, the performance is degraded and the possibility of occurrence of a read error increases due to the narrow space between cell states, resulting in a short lifespan. Therefore, it is important to first decide whether to prioritize the amount of information or performance and longevity depending on the application field of the NAND flash, then choose the appropriate program method.

Figure 1. MLC Cell States

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Figure 2. Decrease in Chip Size according to MLC

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3D/4D-NAND and Trends in the NAND Flash Industry

NAND flash memory is evolving from 2D to 3D and 4D. For 2D-NANDs, the storage capacity has increased by forming a smaller active and gate using lateral scaling to form a larger number of cells in the same area. Until the beginning of 2010, scaling in 2D-NANDs was the main focus of the technology; however, due to the limitations of fine patterning and the lifespan issue where the data is lost over time, it became no longer possible to scale. Instead, 3D-NANDs have been the main focus since the early 2010s and now all NAND manufacturers are developing and manufacturing 3D-NANDs.

3D-NANDs have a structure where storage capacity increases as the number of layers stacked through the three-dimensional stacking increases. 3D-NANDs use a method of stacking multiple layers of oxide-nitride, forming a vertical deep hole called a “plug” thereon, and then forming a memory device made of oxide-nitride-oxide therein. Through this method, a large number of cells can be simultaneously formed through a small number of processes. In a 3D-NAND, current flows through a polysilicon channel located at the center of a cylindrical cell, and program and erase information are stored according to the type of the charge stored in the silicon nitride. While forming a smaller cell was the goal of the technological development in the 2D-NAND, the core technology for the 3D-NAND is to realize three-dimensional stacking with a higher number of layers.

Recently, to further maximize the storage capacity following the 3D-NANDs, SK hynix has developed a 4D-NAND which can make the chip size even smaller. 4D-NANDs form a peripheral circuit under the 3D-NAND cell to eliminate the area occupied by the peripheral circuit, resulting in the maximization of storage capacity and lower cost of NAND flash. Over the generations, the industry increases the number of layers to store more information. The industry’s leading companies including SK hynix have already completed the development and production preparations of products up to 128 layers, and even products with a larger number of layers are under development.

Figure 3. Comparison of 2D-NAND and 3D-NAND

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SK hynix’s Efforts in NAND Flash Technology

SK hynix presented a new 4D-NAND platform that maximizes storage capacity by forming peripheral circuits under the cell, using the periphery under cell (PUC) technology in the 96-layer, which is the 5th-generation 3D NAND, for the first time in the industry. In addition, SK hynix developed the industry’s first 6th-generation 128-layer product by applying the same platform, demonstrating its technological prowess in 4D-NANDs and effectiveness of the Tech Platform strategy.

The SK hynix’s 6th-generation 128-layer NAND flash features increased productivity by 40% through a 33% increase in the number of layers compared to the previous one. The random read performance was highly improved by implementing the plane interleave technology without compromising the chip area thanks to the PUC technology. In addition, the power consumption was also improved by more than 30% compared to the existing product.

In the background of this, there exists the Tech Platform strategy. While this strategy increases only the number of layers to enhance the capacity, it minimizes its development speed and investment costs by maintaining the same structure and technology. In other words, this strategy is optimal for 4D-NANDs where the capacity is enhanced by increasing only the number of layers while maintaining the same cell size. SK hynix is accelerating the development of the 7th-generation and other following products by applying this strategy to continue its technological leadership in the NAND flash sector.

Figure 4. Concept diagram representing the evolution from 2D to 4D-NAND

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Figure 5. 128-layer 1Tb TLC NAND flash

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Explosive Growth for NAND Flash

NAND flash is showing explosive growth with servers including mobile and data centers. In response to this, NAND flash technology has evolved from 2D NANDs to 3D-NANDs, and then 4D-NANDs. Technologies for NAND flash are being developed to increase the storage capacity, accelerate the write and read speed, decrease the power consumption, and reduce the cost. SK hynix, a leading developer of the 4D-NAND technology, will maintain its leadership in the NAND flash evolution in the future and provide a better experience to customers with its high-performance, low-power NAND flash memory.

The post Flashback : The Evolution of NAND Flash Technology first appeared on SK hynix Newsroom.