One day in 2008, the performance test for the graphic DRAM was in full swing at the Design Analysis Office at SK hynix (Hynix Semiconductor Inc. at that time). Joohwan Cho (DRAM PE), who was working hard on research, was the key person of the development and this is the person we will introduce in this article today.

“Graphic DRAM is a product specialized in ‘speed’, as it is optimal for fast data processing. If we could develop a high-speed technology for a graphic DRAM, it would mean that we could timely release higher performance products than our competitors, as it can be applied to main memory DRAMs or mobile DRAMs. At that time, SK hynix was also preparing a new graphic DRAM, GDDR5, with a goal of achieving 7Gbps speed (processing 7 gigabit of data per second). It can sound relatively slow when you compare it to the current level, but at that time, it was ‘SUPEX (Super Excellent)’, which means the highest level that humans can achieve, as a core concept of SK Group’s management. We set the high target like this from the beginning, as a ‘strategy’ to dominate the DRAM market.”

To achieve “7Gbps”, all existing designs had to be fundamentally changed. For this reason, the design team at that time attempted to apply the “2-Phase Clocking” design technology for the first time in the DRAM industry. “Clocking” is a method for synchronizing transmitted and received data during data transmission, and “2-Phase” is a technology that secures a spare time for operation by dividing the frequency. In other words, when comparing it to the water flow, this concept is like making the water flow in two pipelines and then combining two water flows afterwards, while the water flowed through only one pipeline previously.

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In fact, Joohwan Cho had tried the “2-Phase Clocking” technology for the previous generation, GDDR4, but this did not lead to a great result. For him, GDDR4 meant the pain and a valuable lesson at the same time. Therefore, the success of GDDR5 was something he wanted to achieve and something he had to achieve. Also, as he took on the leader for this project at the relatively earlier stage of his career at that time, his sense of responsibility and his will was greater than anyone else.

The World’s first 40nm-class 2 Gigabit Graphic DDR5 Proves the “High Position” by Its Market Share

The product that was born after the enormous efforts was the 2 gigabit (Gb) GDDR5 where a 40nm-class process was applied for the first time in the world. This product could process 28 gigabytes (GB) of data per second through 32 input/output (I/O), with a processing speed of 7Gbps. The capacity was also doubled compared to the existing 50nm-class 1Gb product, which could meet the demand for high-capacity products. Also, energy consumption has been reduced by 20% compared to the previous one with low power operation of 1.35V.

40nm-class 2 gigabit (GB) graphic DDR5 product developed
by Hynix Semiconductor (predecessor to SK hynix)

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Graphic DRAM was characterized by its capability of processing a large amount of data at once compared to general-purpose DRAM. GDDR5, which dramatically enhanced processing speed, was optimal for high-end desktops or laptops that required high-resolution and high-speed operation.

“Like today, early adopters, consumers who tend to purchase and use newly released products than others, used to measure the performance of newly released graphic cards by using various programs and share the results with others. There were many responses that SK hynix’s graphic DRAM was well ‘overclocked’. Here, overclocking means artificially controlling the chip performance to make it faster than it actually is. Consumer preference was very high in terms of performance as well. This suggests that this product was very competitive.”

Earlier, Hynix Semiconductor had succeeded in developing the world’s first 60nm-class 1Gb GDDR5 in 2007 and 50nm-class 1Gb GDDR5 in 2008, accounting for around 50% of the DRAM market’s share. With the development of the GDDR5 product, it secured a market share of nearly 70% and held an unchallenged position in the high-performance graphic DRAM market whilst leading the market.

Joohwan Cho, who has contributed to the development of SK hynix by committing himself to DRAM design for 27 years, has been recognized for his various achievements in Korea and other countries. The awards he has received so far include the In-house Year-end General Award, 38nm Graphic Special Award, and the SK Management System (SKMS) Practice Award. In 2015, he was recognized for his contribution to improving technological competitiveness by securing the 30nm-class GDDR5 design technology by receiving the Minister’s Award for the “Semiconductor Day” in Korea. As his career suggests, many products that have gone through his hands, but the 40nm-class 2Gb GDDR5 has always a special meaning to him.

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“It was a product that made me realize and reminded me of the fact that we also have the DNA for taking the No.1 ranking and the ability to achieve it. The sense of accomplishment I felt at that time has been motivating me greatly even to this day. I believe that if we take the first place in several fields one by one, we will win the first place in the entire DRAM market. I hope the juniors also remember good precedents like GDDR5 and work with confidence.”

The post Head of DRAM PE Joohwan Cho, Key Person of the Development of the World’s First 40nm-class 2Gb Graphic DDR5 first appeared on SK hynix Newsroom.

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In 2013, there were some people at SK hynix who were working hard to make a masterpiece semiconductor product that would serve as a main source of revenue in the long term. One of the key people was Seon Soon Kim, Head of DRAM PI (Process Integration), who was performing jobs related to the PI for DRAMs at that time.

After working in Wuxi, China from 2009 to 2012, Kim returned to the headquarters in 2013 and joined a new DRAM development project. At that time, Kim was a member of the PI Part involved in the overall manufacturing process from core development to yield increase (ramp-up) after the mass production transfer and later took a new task, the development of 20-nano-level 8Gb DDR4. Kim was put into full-scale development work, with the device engineers who worked with him at that time in the DRAM Device Product Development (PD) Team of the DRAM Device Group.

“At that time, IT technology was developing very rapidly. Accordingly, the need for high-speed, high-density, and low-power products began to emerge in the IT industry. Among them, the need for high-density and high-speed products was particularly great. Therefore, we judged that the DDR4, which reduces power consumption while increasing the speed for high-capacity 8Gb products, would be very competitive.”

To develop the 20-nano-level 8Gb DDR4, several hardships had to be overcome. First, a 2Ynm process technology, which is more advanced than the existing 2Xnm process technology, was necessary to be developed. At that time, the company’s competitor had already optimized the 2Ynm process technology. The process of securing 8GB capacity was not easy. The only thing that the project team members could do in such a situation was to do their best with tenacious devotion to their job.

As a member of the project team, Kim’s days at that time were also busy, without a break. He usually liked to hike or walk in a park with his family to enjoy the natural views, but he couldn’t have any time for relaxing and enjoying himself in the spring that year. For him, the only time for enjoying the season was when he was taking a short walk or relaxing for a few minutes, listening to a song in the office.

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“In springs, I had my own routine of walking on various hiking trails for enjoying different flowers each time. During the project, however, I was so busy that I had to take a short walk listening to the song instead. Even now, in spring, whenever I listen to the song that I used to listen to, it brings back the memory of that time, reminding me that I have overcome those days well. Along with the song, my family and colleagues were around me, so I was able to do my best to develop the DRAM until the end without getting tired.”

Development of the World’s First Ultra-High-Capacity 128GB DDR4 Module Opens a New Horizon in the IT Industry

The product that was born through the commitment despite numerous difficulties is the world’s first ultra-high-capacity 128GB DDR4 module based on 2Ynm 8Gb DDR4. As a derivative of 2Ynm 8Gb DDR4, this product realized the maximum level of capacity, doubling the highest capacity existing at that time, which was 64GB.

To realize the maximum capacity, a Through Silicon Via (TSV) technology was first applied to mass production. This is a technology that transmits commands and data by stacking DRAM chips vertically and creating a column-shaped movement path through the entire layers. As a technology that can replace the existing wire bonding, which connects wires to the outside of a chip for signal transmission, it dramatically reduces the distance between chips or the distance from printed circuit board (PCB). This not only enabled high-speed and low-power communication, but also stacking with over a double number of layers.

As a result, when comparing to the previous generation DDR3, the specification has improved more than twice. The capacity has been doubled from 64GB to 128GB. The transmission speed was upgraded from 1,333Mbps to 2,133Mbps, and the operating voltage was also decreased from 1.35V to 1.2V.

This product surpassed technical limitations by developing a process technology and applying the TSV technology, and it played a huge role in helping SK hynix become the key player of the server market afterwards. This was because this product satisfied all different needs in the server market, such as needs for products with high-density, high-speed, and low-power. For SK hynix, it was a turning point where it made customers aware of the fact that SK hynix was capable of proactively responding to the server market.

Just like the spring representing a new start and change, the 128GB DDR4 module presented another spring to SK hynix. One of its developers, Seon Soon Kim, is now taking a very active part as a leader of the DRAM business based on his achievements. What does a 128GB DDR4 module mean to him?

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“For me, the 128GB DDR4 module means ‘the beginning of change’. There have been many personal changes since the development of this product. As my position at work changed, the form of work also changed. When the company implemented new projects, I always actively participated in them. I think I’ve been able to enjoy changes without missing an opportunity and actively respond to those changes. The world is changing rapidly. If we stay the same, it will be impossible to move forward, neither at a personal level nor at a company level. Just like the 128GB DDR4 module opened a new era, I hope that the members at the company also voluntarily bring and enjoy changes and become the key people of the world to come.”

The post Key Person of the Development of 128GB DDR4 Module with the World’s First Maximum Capacity: Seon Soon Kim, Head of DRAM PI first appeared on SK hynix Newsroom.