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		<title>How Innovative Convergence Technology Is Tackling DRAM Scaling Challenges</title>
		<link>https://skhynix-news-global-stg.mock.pe.kr/how-innovative-convergence-technology-is-tackling-dram-scaling-challenges/</link>
		
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		<pubDate>Tue, 25 Jul 2023 00:00:09 +0000</pubDate>
				<category><![CDATA[featured]]></category>
		<category><![CDATA[Opinion]]></category>
		<category><![CDATA[DRAM]]></category>
		<category><![CDATA[RTC]]></category>
		<category><![CDATA[Revolutionary Technology Center]]></category>
		<category><![CDATA[AFE/DE]]></category>
		<category><![CDATA[FE/DE]]></category>
		<category><![CDATA[Capacitor]]></category>
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					<description><![CDATA[<p>As DRAM cell scaling reaches its limit, SK hynix is ​​conducting various studies to continue the advancement of DRAM technology. The company and DRAM manufacturers face several challenges as they look to push the boundaries of the technology. One of the most significant issues faced by the industry is the required capacitance1 must be maintained [&#8230;]</p>
<p>The post <a href="https://skhynix-news-global-stg.mock.pe.kr/how-innovative-convergence-technology-is-tackling-dram-scaling-challenges/">How Innovative Convergence Technology Is Tackling DRAM Scaling Challenges</a> first appeared on <a href="https://skhynix-news-global-stg.mock.pe.kr">SK hynix Newsroom</a>.</p>]]></description>
										<content:encoded><![CDATA[<p>As DRAM cell scaling reaches its limit, SK hynix is ​​conducting various studies to continue the advancement of DRAM technology. The company and DRAM manufacturers face several challenges as they look to push the boundaries of the technology. One of the most significant issues faced by the industry is the required capacitance<sup>1</sup> must be maintained even if the area of the DRAM cell capacitor is reduced. In order to meet the requirements for future DRAM cell capacitors, it is therefore imperative to develop ultra-thin dielectric<sup>2</sup> (DE) materials with a higher dielectric constant<sup>3</sup> (K) and low-leakage currents.</p>
<p style="font-size: 14px; font-style: italic; color: #555;"><sup>1</sup><strong>Capacitance</strong>: The ability of a component or circuit to collect and store energy in the form of an electrical charge.<br />
<sup>2</sup><strong>Dielectric (DE)</strong>: Insulators that become polarized to support an electrostatic field when they are exposed to an electric field.<br />
<sup>3</sup><strong>Dielectric constant</strong>: A value representing the electrical dielectric properties of the dielectric. The higher the dielectric constant, the more charge the dielectric can accumulate.</p>
<p>To further the development of such materials, SK hynix’s Revolutionary Technology Center (RTC) conducted a study which fused ultra-thin ferroelectric<sup>4</sup> (FE) and anti-ferroelectric<sup>5</sup> (AFE) materials, respectively, with ultra-thin dielectric materials as shown in Figure 1. This article will summarize the process and results of the study, which were first announced at the IEEE Electron Devices Technology and Manufacturing (EDTM) Conference 2023.</p>
<p style="font-size: 14px; font-style: italic; color: #555;"><sup>4</sup><strong>Ferroelectric (FE)</strong>: A material which exhibits spontaneous electric polarization without an external electrical field that can be reversed in direction by the application of an appropriate electric field.<br />
<sup>5</sup><strong>Anti-ferroelectric (AFE)</strong>: A material which exhibits ferroelectric polarization properties in external electric fields but does not have spontaneous polarization in the absence of external electric fields.</p>
<p><img loading="lazy" decoding="async" class="alignnone size-full wp-image-12247" src="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/07/24114656/Schematic-of-FEDE-and-AFEDE-capacitors.png" alt="" width="1000" height="576" srcset="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/07/24114656/Schematic-of-FEDE-and-AFEDE-capacitors.png 1000w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/07/24114656/Schematic-of-FEDE-and-AFEDE-capacitors-680x392.png 680w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/07/24114656/Schematic-of-FEDE-and-AFEDE-capacitors-768x442.png 768w" sizes="(max-width: 1000px) 100vw, 1000px" /></p>
<p class="source">Figure 1. [Left] Schematic diagram and planar view of FE/DE and AFE/DE pillar-type DRAM capacitors with the same structure. [Right] Thin films of O-phase rich HZO FE double layers and T-phase rich HZO AFE double layers are applied to determine which is most effective.</p>
<p>&nbsp;</p>
<p>To determine whether FE or AFE materials are more suitable for use as a DRAM cell capacitor, hafnium zirconium oxide<sup>6</sup> (HZO)-based FE (O-phase<sup>7</sup> HZO) and AFE materials (T-phase<sup>8</sup> HZO), which are highly compatible with the CMOS process, were used to manufacture ultra-thin FE/DE and AFE/DE double layers.</p>
<p style="font-size: 14px; font-style: italic; color: #555;"><sup>6</sup><strong>Hafnium-zirconium oxide (HZO)</strong>: Oxide (HfZrO2) consisting of hafnium (Hf) and zirconium (Zr).<br />
<sup>7</sup><strong>Orthorhombic phase (O-phase)</strong>: A crystal structure with three different axes at right angles. O-phase HZO shows ferroelectric properties.<br />
<sup>8</sup><strong>Tetragonal phase (T-phase)</strong>: A crystal structure in which three axes are at right angles and two of them are the same. T-phase HZO shows electrical properties similar to anti-ferroelectricity.</p>
<p>For the study, the FE and AFE properties of the fabricated double layers were controlled. An analysis was conducted of the correlation between equivalent oxide thickness<sup>9</sup> (EOT), a key characteristic of DRAM capacitors, and residual charge<sup>10</sup> (Qrem), a core property of ferroelectrics.</p>
<p style="font-size: 14px; font-style: italic; color: #555;"><sup>9</sup><strong>Equivalent oxide thickness (EOT)</strong>: The thickness of a transistor’s silicon oxide film that would be required to provide the same electrical performance as the high-κ material being used.<br />
<sup>10</sup><strong>Residual charge (Qrem)</strong>: Polarization remaining in ferroelectric or anti-ferroelectric thin films.</p>
<p>As shown in Figure 2, the capacitor composed of FE/DE showed a trade-off relationship in which the EOT greatly improved, but the Qrem increased rapidly. This was due to the sharp increase in the FE characteristics of the FE layer and the spontaneous polarization properties, causing a rise in the residual polarization. In contrast, the AFE/DE capacitor demonstrated a small improvement in EOT and a minimal increase in Qrem because the spontaneous polarization characteristics of the AFE were very low compared to the FE.</p>
<p><img loading="lazy" decoding="async" class="alignnone size-full wp-image-12246" src="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/07/24114651/Distribution-of-various-Qrem-and-EOT-characteristics-of-FEDE-and-AFEDE.png" alt="" width="1000" height="632" srcset="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/07/24114651/Distribution-of-various-Qrem-and-EOT-characteristics-of-FEDE-and-AFEDE.png 1000w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/07/24114651/Distribution-of-various-Qrem-and-EOT-characteristics-of-FEDE-and-AFEDE-633x400.png 633w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/07/24114651/Distribution-of-various-Qrem-and-EOT-characteristics-of-FEDE-and-AFEDE-768x485.png 768w" sizes="(max-width: 1000px) 100vw, 1000px" /></p>
<p class="source">Figure 2.  A scatter graph showing the distribution of various Qrem and EOT characteristics of FE/DE and AFE/DE materials</p>
<p>&nbsp;</p>
<p>In order to analyze the difference in the operation of DRAM cells according to residual polarization characteristics, the breakdown voltage (BV)<sup>11</sup>, a major trade-off characteristic of capacity, and capacitance values of AFE/DE and FE/DE were evaluated (Figure 3). The two capacitors showed similar BV and capacitance values, but there was a significant difference recorded in DRAM cell operation (Figure 3a).</p>
<p style="font-size: 14px; font-style: italic; color: #555;"><sup>11</sup><strong>Breakdown voltage (BV)</strong>: Minimum voltage at which part of the insulator is electrically destroyed and becomes conductive.</p>
<p>DRAM cells using the AFE/DE capacitor showed significantly less tWR<sup>12</sup> and FBC<sup>13</sup> than DRAM cells with the FE/DE capacitor (Figure 3b). This is because when the data write operation time of the DRAM cell is checked through the tWR test, a relatively large amount of Qrem characteristics caused by the ferroelectricity of FE/DE act in the opposite polarity during the write operation. This hinders the subsequent DRAM operation, and the write operation does not function correctly. Therefore, when using FE and AFE as DRAM capacitors, it is important to consider not only the capacitance and BV characteristics (leakage current), but also the Qrem properties.</p>
<p style="font-size: 14px; font-style: italic; color: #555;"><sup>12</sup><strong>Write recovery time (tWR)</strong>: The appropriate amount of time required for data to be written to a DRAM cell; insufficient tWR will cause data errors during data read and write operations.<br />
<sup>13</sup><strong>Fail bit counts (FBC)</strong>: Number of fail bits generated by one wafer during DRAM operation evaluation.</p>
<p>&nbsp;</p>
<p><img loading="lazy" decoding="async" class="alignnone size-full wp-image-12245" src="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/07/24114645/Evaluation-of-DRAM-cell-operation-in-FEDE-and-AFEDE.png" alt="" width="1000" height="510" srcset="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/07/24114645/Evaluation-of-DRAM-cell-operation-in-FEDE-and-AFEDE.png 1000w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/07/24114645/Evaluation-of-DRAM-cell-operation-in-FEDE-and-AFEDE-680x347.png 680w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/07/24114645/Evaluation-of-DRAM-cell-operation-in-FEDE-and-AFEDE-768x392.png 768w" sizes="(max-width: 1000px) 100vw, 1000px" /></p>
<p class="source">Figure 3. Results of selecting and evaluating AFE/DE and FE/DE with similar BV values and capacitance. (a) Scatterplot of BV and capacitance properties of FE/DE and AFE/DE (b) 12-inch wafer map for tWR fail bits in DRAM cells (c) correlation graph of FBC and Qrem properties.</p>
<p>&nbsp;</p>
<p>In summary, this study investigated the electrical properties of FE/DE and AFE/DE materials and verified actual operation in DRAM cells. FE/DE materials demonstrated excellent potential for reducing EOT, but it was confirmed that the probability of fail bit generation during the tWR test increased rapidly due to its relatively high residual charge characteristics. On the other hand, AFE/DE is limited in reducing EOT, but the probability of fail bit generation during the tWR test is reduced due to the relatively low residual charge characteristics.</p>
<p>It was therefore concluded that AFE/DE is more suitable for use as a DRAM cell capacitor than FE/DE because residual charges must be strictly controlled for stable DRAM operation. To realize further miniaturization of DRAM technology, various new methods will need to be developed and verified to secure materials with strong FE characteristics.</p>
<p>&nbsp;</p>
<p><em>For more information regarding RTC’s research, please visit the center’s </em><em>research website (</em><span style="text-decoration: underline;"><a href="https://research.skhynix.com" target="_blank" rel="noopener noreferrer"><em>https://research.skhynix.com</em></a></span><em>). The RTC operates the site to</em><em> share insights on its ongoing research of future technologies and to actively communicate with various global research organizations.</em></p>
<p><img loading="lazy" decoding="async" class="alignnone size-full wp-image-12071" src="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/06/23065324/Profile-banner_Wontae-Koo.png" alt="" width="1000" height="170" srcset="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/06/23065324/Profile-banner_Wontae-Koo.png 1000w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/06/23065324/Profile-banner_Wontae-Koo-680x116.png 680w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/06/23065324/Profile-banner_Wontae-Koo-768x131.png 768w" sizes="(max-width: 1000px) 100vw, 1000px" /><img loading="lazy" decoding="async" class="alignnone size-full wp-image-12070" src="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/06/23065322/Profile-banner_Dongik-Suh.png" alt="" width="1000" height="170" srcset="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/06/23065322/Profile-banner_Dongik-Suh.png 1000w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/06/23065322/Profile-banner_Dongik-Suh-680x116.png 680w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/06/23065322/Profile-banner_Dongik-Suh-768x131.png 768w" sizes="(max-width: 1000px) 100vw, 1000px" /></p><p>The post <a href="https://skhynix-news-global-stg.mock.pe.kr/how-innovative-convergence-technology-is-tackling-dram-scaling-challenges/">How Innovative Convergence Technology Is Tackling DRAM Scaling Challenges</a> first appeared on <a href="https://skhynix-news-global-stg.mock.pe.kr">SK hynix Newsroom</a>.</p>]]></content:encoded>
					
		
		
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