<?xml version="1.0" encoding="UTF-8"?><rss version="2.0"
	xmlns:content="http://purl.org/rss/1.0/modules/content/"
	xmlns:wfw="http://wellformedweb.org/CommentAPI/"
	xmlns:dc="http://purl.org/dc/elements/1.1/"
	xmlns:atom="http://www.w3.org/2005/Atom"
	xmlns:sy="http://purl.org/rss/1.0/modules/syndication/"
	xmlns:slash="http://purl.org/rss/1.0/modules/slash/"
	>

<channel>
	<title>CXL DevCon - SK hynix Newsroom</title>
	<atom:link href="https://skhynix-news-global-stg.mock.pe.kr/tag/cxl-devcon/feed/" rel="self" type="application/rss+xml" />
	<link>https://skhynix-news-global-stg.mock.pe.kr</link>
	<description></description>
	<lastBuildDate>Thu, 02 May 2024 06:10:43 +0000</lastBuildDate>
	<language>en-US</language>
	<sy:updatePeriod>
	hourly	</sy:updatePeriod>
	<sy:updateFrequency>
	1	</sy:updateFrequency>
	<generator>https://wordpress.org/?v=6.7.2</generator>

<image>
	<url>https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2019/10/29044430/152x152-100x100.png</url>
	<title>CXL DevCon - SK hynix Newsroom</title>
	<link>https://skhynix-news-global-stg.mock.pe.kr</link>
	<width>32</width>
	<height>32</height>
</image> 
	<item>
		<title>SK hynix Presents CXL Memory Solutions Set to Power the AI Era at CXL DevCon 2024</title>
		<link>https://skhynix-news-global-stg.mock.pe.kr/sk-hynix-presents-ai-memory-solutions-at-cxl-devcon-2024/</link>
		
		<dc:creator><![CDATA[user]]></dc:creator>
		<pubDate>Thu, 02 May 2024 05:00:14 +0000</pubDate>
				<category><![CDATA[Business]]></category>
		<category><![CDATA[featured]]></category>
		<category><![CDATA[DDR5]]></category>
		<category><![CDATA[AI]]></category>
		<category><![CDATA[CXL]]></category>
		<category><![CDATA[AI Memory]]></category>
		<category><![CDATA[CXL DevCon]]></category>
		<category><![CDATA[HMSDK]]></category>
		<category><![CDATA[CMM-DDR5]]></category>
		<guid isPermaLink="false">http://admin.news.skhynix.com/?p=14948</guid>

					<description><![CDATA[<p>SK hynix’s booth at CXL DevCon 2024 &#160; SK hynix participated in the first-ever Compute Express Link Consortium Developers Conference (CXL DevCon) held in Santa Clara, California from April 30–May 1. Organized by a group of more than 240 global semiconductor companies known as the CXL Consortium, CXL DevCon 2024 welcomed a majority of the [&#8230;]</p>
<p>The post <a href="https://skhynix-news-global-stg.mock.pe.kr/sk-hynix-presents-ai-memory-solutions-at-cxl-devcon-2024/">SK hynix Presents CXL Memory Solutions Set to Power the AI Era at CXL DevCon 2024</a> first appeared on <a href="https://skhynix-news-global-stg.mock.pe.kr">SK hynix Newsroom</a>.</p>]]></description>
										<content:encoded><![CDATA[<div class="swiper-container">
<div class="swiper-wrapper">
<div class="swiper-slide">
<p class="img_area"><img decoding="async" class="alignnone size-full wp-image-4330" style="width: 800px;" title="SK hynix’s booth at CXL DevCon 2024" src="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/05/02032546/SK-hynix%E2%80%99s-booth-at-CXL-DevCon-2024_01.png" alt="SK hynix’s booth at CXL DevCon 2024" /></p>
</div>
<div class="swiper-slide">
<p class="img_area"><img loading="lazy" decoding="async" class="alignnone wp-image-14969 size-full" style="width: 800px;" title="SK hynix’s booth at CXL DevCon 2024" src="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/05/02033114/SK-hynix%E2%80%99s-booth-at-CXL-DevCon-2024_02.png" alt="SK hynix’s booth at CXL DevCon 2024_02" width="1000" height="562" srcset="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/05/02033114/SK-hynix%E2%80%99s-booth-at-CXL-DevCon-2024_02.png 1000w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/05/02033114/SK-hynix%E2%80%99s-booth-at-CXL-DevCon-2024_02-680x382.png 680w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/05/02033114/SK-hynix%E2%80%99s-booth-at-CXL-DevCon-2024_02-768x432.png 768w" sizes="(max-width: 1000px) 100vw, 1000px" /></p>
</div>
</div>
<div class="swiper-button-next"></div>
<div class="swiper-button-prev"></div>
<div class="swiper-pagination"></div>
</div>
<p class="source" style="text-align: center;">SK hynix’s booth at CXL DevCon 2024</p>
<p>&nbsp;</p>
<p>SK hynix participated in the first-ever Compute Express Link Consortium Developers Conference (CXL DevCon) held in Santa Clara, California from April 30–May 1. Organized by a group of more than 240 global semiconductor companies known as the <a href="https://computeexpresslink.org/"><span style="text-decoration: underline;">CXL Consortium</span></a>, CXL DevCon 2024 welcomed a majority of the consortium’s members to showcase their latest technologies and research results.</p>
<p>CXL is a technology that unifies the interfaces of different devices in a system such as semiconductor memory, storage, and logic chips. As it can increase system bandwidth and processing capacity, CXL is receiving attention as a key technology for the AI era in which high performance and capacity are essential.</p>
<p>Under the slogan &#8220;Memory, The Power of AI,&#8221; SK hynix showcased a range of CXL products at the conference that are set to strengthen the company&#8217;s leadership in AI memory technology.</p>
<div class="swiper-container">
<div class="swiper-wrapper">
<div class="swiper-slide">
<p class="img_area"><img loading="lazy" decoding="async" class="alignnone wp-image-14970 size-full" style="width: 800px;" title="CMM-DDR5 increases system bandwidth and capacity" src="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/05/02033206/CMM-DDR5-increases-system-bandwidth-and-capacity_01.png" alt="CMM-DDR5 increases system bandwidth and capacity_01" width="1000" height="562" srcset="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/05/02033206/CMM-DDR5-increases-system-bandwidth-and-capacity_01.png 1000w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/05/02033206/CMM-DDR5-increases-system-bandwidth-and-capacity_01-680x382.png 680w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/05/02033206/CMM-DDR5-increases-system-bandwidth-and-capacity_01-768x432.png 768w" sizes="(max-width: 1000px) 100vw, 1000px" /></p>
</div>
<div class="swiper-slide">
<p class="img_area"><img loading="lazy" decoding="async" class="alignnone wp-image-14971 size-full" style="width: 800px;" title="CMM-DDR5 increases system bandwidth and capacity" src="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/05/02033234/CMM-DDR5-increases-system-bandwidth-and-capacity_02.png" alt="CMM-DDR5 increases system bandwidth and capacity_02" width="1000" height="562" srcset="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/05/02033234/CMM-DDR5-increases-system-bandwidth-and-capacity_02.png 1000w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/05/02033234/CMM-DDR5-increases-system-bandwidth-and-capacity_02-680x382.png 680w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/05/02033234/CMM-DDR5-increases-system-bandwidth-and-capacity_02-768x432.png 768w" sizes="(max-width: 1000px) 100vw, 1000px" /></p>
</div>
</div>
<div class="swiper-button-next"></div>
<div class="swiper-button-prev"></div>
<div class="swiper-pagination"></div>
</div>
<p class="source" style="text-align: center;">CMM-DDR5 increases system bandwidth and capacity</p>
<p>&nbsp;</p>
<p>During a performance demonstration, CXL Memory Module-Double Data Rate 5 (CMM-DDR5<sup>1</sup>) expanded system bandwidth by up to 50% and capacity by up to 100% compared to systems equipped with only DDR5 DRAM. Additionally, SK hynix emphasized the benefits of a software that supports CMM-DDR5 called the Heterogeneous Memory Software Development Kit (HMSDK)<sup>2</sup>. When equipped in systems with both CMM-DDR5 and standard DRAM modules, HMSDK can significantly enhance a system’s capability by relocating data to the appropriate memory device based on frequency of use.</p>
<p style="font-size: 14px; font-style: italic; color: #555;"><sup>1</sup><strong>Double Data Rate 5 (DDR5):</strong> A server DRAM that effectively handles the increasing demands of larger and more complex data workloads by offering enhanced bandwidth and power efficiency compared to the previous generation, DDR4.<br />
<sup>2</sup><strong>Heterogeneous Memory Software Development Kit (HMSDK):</strong> A software development kit specially designed to support CXL memory, a next-generation memory system based on the CXL open industry standard.</p>
<div class="swiper-container">
<div class="swiper-wrapper">
<div class="swiper-slide">
<p class="img_area"><img loading="lazy" decoding="async" class="alignnone wp-image-14985 size-full" style="width: 800px;" title="Niagara 2.0 allows multiple hosts to share capacity" src="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/05/02042451/Niagara-2.0-allows-multiple-hosts-to-share-capacity_01_.png" alt="Niagara 2.0 allows multiple hosts to share capacity_01_" width="1000" height="702" srcset="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/05/02042451/Niagara-2.0-allows-multiple-hosts-to-share-capacity_01_.png 1000w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/05/02042451/Niagara-2.0-allows-multiple-hosts-to-share-capacity_01_-570x400.png 570w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/05/02042451/Niagara-2.0-allows-multiple-hosts-to-share-capacity_01_-768x539.png 768w" sizes="(max-width: 1000px) 100vw, 1000px" /></p>
</div>
<div class="swiper-slide">
<p class="img_area"><img loading="lazy" decoding="async" class="alignnone wp-image-14986 size-full" style="width: 800px;" title="Niagara 2.0 allows multiple hosts to share capacity" src="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/05/02042541/Niagara-2.0-allows-multiple-hosts-to-share-capacity_02_1.png" alt="Niagara 2.0 allows multiple hosts to share capacity_02_" width="1000" height="702" srcset="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/05/02042541/Niagara-2.0-allows-multiple-hosts-to-share-capacity_02_1.png 1000w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/05/02042541/Niagara-2.0-allows-multiple-hosts-to-share-capacity_02_1-570x400.png 570w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/05/02042541/Niagara-2.0-allows-multiple-hosts-to-share-capacity_02_1-768x539.png 768w" sizes="(max-width: 1000px) 100vw, 1000px" /></p>
</div>
</div>
<div class="swiper-button-next"></div>
<div class="swiper-button-prev"></div>
<div class="swiper-pagination"></div>
</div>
<p class="source" style="text-align: center;">Niagara 2.0 allows multiple hosts to share capacity</p>
<p>&nbsp;</p>
<p>SK hynix also displayed Niagara 2.0, a solution that connects multiple CXL memories together to allow numerous hosts such as CPUs and GPUs to optimally share their capacity. This eliminates idle memory usage while reducing power consumption.</p>
<p>Compared with the previous generation Niagara 1.0 which only allowed systems to share capacity with one another, Niagara 2.0 also enables the sharing of data. In turn, this reduces inefficiencies such as redundant data processing and, therefore, improves overall system performance. As a result, these CXL products are expected to be used in AI and high-performance computing (HPC) systems in the future.</p>
<p><img loading="lazy" decoding="async" class="alignnone wp-image-14975 size-full" title="Wonha Choi speaking about the present and future of CXL technology" src="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/05/02033521/Wonha-Choi-speaking-about-the-present-and-future-of-CXL-technology.png" alt="Wonha Choi speaking about the present and future of CXL technology" width="1000" height="562" srcset="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/05/02033521/Wonha-Choi-speaking-about-the-present-and-future-of-CXL-technology.png 1000w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/05/02033521/Wonha-Choi-speaking-about-the-present-and-future-of-CXL-technology-680x382.png 680w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/05/02033521/Wonha-Choi-speaking-about-the-present-and-future-of-CXL-technology-768x432.png 768w" sizes="(max-width: 1000px) 100vw, 1000px" /></p>
<p class="source" style="text-align: center;">Wonha Choi speaking about the present and future of CXL technology</p>
<p>&nbsp;</p>
<p>During the presentation session at the conference, SK hynix’s Distinguished Engineer Wonha Choi of the Next-Gen Memory &amp; Storage team gave a talk titled “Enabling CXL Memory Module, Exploring Memory Expansion Use Cases &amp; Beyond”. The presentation covered the background of CXL’s adoption through to the technology&#8217;s components, research cases and performance, and anticipated applications in the future.</p>
<p>Following its participation at CXL DevCon 2024, SK hynix plans to strengthen its AI memory leadership by advancing CXL technology for its expanding product lineup.</p><p>The post <a href="https://skhynix-news-global-stg.mock.pe.kr/sk-hynix-presents-ai-memory-solutions-at-cxl-devcon-2024/">SK hynix Presents CXL Memory Solutions Set to Power the AI Era at CXL DevCon 2024</a> first appeared on <a href="https://skhynix-news-global-stg.mock.pe.kr">SK hynix Newsroom</a>.</p>]]></content:encoded>
					
		
		
			</item>
	</channel>
</rss>
