• 1c node, 6th generation of 10nm process, developed in most efficient way by applying platform of industry-leading 1b technology
• Cost competitiveness improved with adoption of new material, optimization of EUV process, while power efficiency enhanced to help reduce electricity cost of data centers by 30% maximum
• Mass production expected to be ready this year for volume shipment in 2025
• Application of 1c node to leading-edge DRAM products to bring differentiated values to customers

Seoul, August 29, 2024

SK hynix Inc. (or “the company”, www.skhynix.com) announced today that it has developed the industry’s first 16Gb DDR5 built using its 1c node, the sixth generation of the 10nm process.

The success marks the beginning of the extreme scaling to the level closer to 10nm in the memory process technology.

The degree of difficulty to advance the shrinking process of the 10nm-range DRAM technology has grown over generations, but SK hynix has become the first in the industry to overcome the technological limitations by raising the level of completion in design, thanks to its industry-leading technology of the 1b, the fifth generation of the 10nm process.

SK hynix said it will be ready for mass production of the 1c DDR5 within the year to start volume shipment next year.

In order to reduce potential errors stemming from the procedure of advancing the process and transfer the advantage of the 1b, which is widely applauded for its best performing DRAM, in the most efficient way, the company extended the platform of the 1b DRAM for development of 1c.

The new product comes with an improvement in cost competitiveness, compared with the previous generation, by adopting a new material in certain process of the extreme ultra violet, or EUV, while optimizing the EUV application process of total. SK hynix also enhanced productivity by more than 30% through technological innovation in design.

The operating speed of the 1c DDR5, expected to be adopted for high-performance data centers, is improved by 11% from the previous generation, to 8Gbps. With power efficiency also improved by more than 9%, SK hynix expects adoption of 1c DRAM to help data centers reduce the electricity cost by as much as 30% at a time when advancement of AI era is leading to an increase in power consumption.

“We are committed to providing differentiated values to customers by applying the 1c technology equipped with the best performance and cost competitiveness to our major next-generation products including HBM¹, LPDDR6², and GDDR7³,” said Head of DRAM Development Kim Jonghwan. “We will continue to work towards maintaining the leadership in the DRAM space and position as the most-trusted AI memory solution provider.”

¹HBM(High Bandwidth Memory): a high-value, high-performance memory that vertically interconnects multiple DRAM chips and dramatically increases data processing speed in comparison to conventional DRAM products. Since the introduction of the first HBM, the generation has shifted to HBM2, HBM2E, HBM3, HBM3E, HBM4 and HBM4E.
²LPDDR: low power DRAM for mobile devices, including smartphones and tablets, which aims to minimize power consumption and features low voltage operation. The latest specifications are for the 7th generation, succeeding the series that end with 1, 2, 3, 4, 4X, 5 and 5X.
³GDDR(Graphics DDR): a standard specification of graphics DRAM defined by the Joint Electron Device Engineering Council (JEDEC) and specialized for processing graphics more quickly. Its generation has shifted from GDDR3, GDDR5, GDDR5X, GDDR6 to GDDR7. With the newer generation promising faster speed and higher power efficiency, GDDR has now become one of the most popular memory chips for AI.

About SK hynix Inc.

SK hynix Inc., headquartered in Korea, is the world’s top tier semiconductor supplier offering Dynamic Random Access Memory chips (“DRAM”), flash memory chips (“NAND flash”) and CMOS Image Sensors (“CIS”) for a wide range of distinguished customers globally. The Company’s shares are traded on the Korea Exchange, and the Global Depository shares are listed on the Luxembourg Stock Exchange. Further information about SK hynix is available at www.skhynix.com, news.skhynix.com.

Media Contact

SK hynix Inc.
Global Public Relations

Technical Leader
Kanga Kong
E-Mail: global_newsroom@skhynix.com

Technical Leader
Sooyeon Lee
E-Mail: global_newsroom@skhynix.com

The post SK hynix Develops Industry’s First 1c DDR5 first appeared on SK hynix Newsroom.

SK hynix’s booth at CXL DevCon 2024

SK hynix participated in the first-ever Compute Express Link Consortium Developers Conference (CXL DevCon) held in Santa Clara, California from April 30–May 1. Organized by a group of more than 240 global semiconductor companies known as the CXL Consortium, CXL DevCon 2024 welcomed a majority of the consortium’s members to showcase their latest technologies and research results.

CXL is a technology that unifies the interfaces of different devices in a system such as semiconductor memory, storage, and logic chips. As it can increase system bandwidth and processing capacity, CXL is receiving attention as a key technology for the AI era in which high performance and capacity are essential.

Under the slogan “Memory, The Power of AI,” SK hynix showcased a range of CXL products at the conference that are set to strengthen the company’s leadership in AI memory technology.

CMM-DDR5 increases system bandwidth and capacity

During a performance demonstration, CXL Memory Module-Double Data Rate 5 (CMM-DDR5¹) expanded system bandwidth by up to 50% and capacity by up to 100% compared to systems equipped with only DDR5 DRAM. Additionally, SK hynix emphasized the benefits of a software that supports CMM-DDR5 called the Heterogeneous Memory Software Development Kit (HMSDK)². When equipped in systems with both CMM-DDR5 and standard DRAM modules, HMSDK can significantly enhance a system’s capability by relocating data to the appropriate memory device based on frequency of use.

¹Double Data Rate 5 (DDR5): A server DRAM that effectively handles the increasing demands of larger and more complex data workloads by offering enhanced bandwidth and power efficiency compared to the previous generation, DDR4.
²Heterogeneous Memory Software Development Kit (HMSDK): A software development kit specially designed to support CXL memory, a next-generation memory system based on the CXL open industry standard.

Niagara 2.0 allows multiple hosts to share capacity

SK hynix also displayed Niagara 2.0, a solution that connects multiple CXL memories together to allow numerous hosts such as CPUs and GPUs to optimally share their capacity. This eliminates idle memory usage while reducing power consumption.

Compared with the previous generation Niagara 1.0 which only allowed systems to share capacity with one another, Niagara 2.0 also enables the sharing of data. In turn, this reduces inefficiencies such as redundant data processing and, therefore, improves overall system performance. As a result, these CXL products are expected to be used in AI and high-performance computing (HPC) systems in the future.

Wonha Choi speaking about the present and future of CXL technology

During the presentation session at the conference, SK hynix’s Distinguished Engineer Wonha Choi of the Next-Gen Memory & Storage team gave a talk titled “Enabling CXL Memory Module, Exploring Memory Expansion Use Cases & Beyond”. The presentation covered the background of CXL’s adoption through to the technology’s components, research cases and performance, and anticipated applications in the future.

Following its participation at CXL DevCon 2024, SK hynix plans to strengthen its AI memory leadership by advancing CXL technology for its expanding product lineup.

The post SK hynix Presents CXL Memory Solutions Set to Power the AI Era at CXL DevCon 2024 first appeared on SK hynix Newsroom.

The post Pioneering Excellence in 2023 first appeared on SK hynix Newsroom.

• SK hynix and Intel co-published performance verification white paper on DDR5’s application to Intel CPUs for use in servers
• SK hynix’s DDR5 boosts server bandwidth by 70% while lowering power consumption by 14.4% compared to the product’s previous generation
• SK hynix plans to accelerate improvement in its second-half performance with its quality-certified DDR5

SK hynix announced on September 14th that it has co-published a white paper with Intel which reveals that its DDR5 server DRAM applied to Intel’s CPUs demonstrated industry-leading performance levels. This white paper was released simultaneously on the SK hynix and Intel websites.

The two companies have worked closely together since the beginning of DDR5’s development, and this white paper shows the results of performance evaluations of SK hynix’s DDR5 when applied to 4th Gen Intel^® Xeon^® Scalable processors¹ (hereinafter referred to as Xeon) that took place over the past eight months.

Released at a time when the server industry has called for low-power, high-performance semiconductors, the white paper highlights that SK hynix and Intel will usher in an era of more advanced data centers through memory and CPUs that deliver industry-leading performance and energy efficiency.

[Read the full white paper]

The white paper reveals that SK hynix’s DDR5 uses 14.4% less power than DDR4, while the 4th Gen Intel^® Xeon^® Scalable processors offer performance efficiency that is 2.9 times greater than the previous generation². In servers with Xeon, DDR5 achieved an improved performance per watt³ that was 1.22 times higher for integer computations and 1.11 times higher for floating point⁴ computations compared to DDR4.

Accordingly, the two companies expect the energy efficiency provided by DDR5 and Xeon to allow server chip customers to build more sustainable data centers. The operation of such cost-effective data centers is also expected to help customers save on the total cost of ownership (TCO)⁵.

“As revealed in the white paper, servers equipped with SK hynix’s DDR5 and Intel’s CPUs enable faster data processing speeds while consuming less power compared to the products’ previous generations. In particular, they can efficiently utilize high-density DRAMs required for processing vast amounts of data in applications such as generative AI,” said Sungsoo Ryu, head of DRAM Product Planning at SK hynix.

“We hope that our server chip customers will use the valuable information included in this white paper to drive their business forward,” he added.

Dr. Dimitrios Ziakas, Intel’s vice president of Memory and IO Technologies, said: “Intel has been collaborating with SK hynix and memory industry partners to enable high-performance DDR5 DRAM with 4th Gen Intel^® Xeon^® Scalable processors. These efforts ensure that we provide robust high-performance and energy-efficient data center system solutions to benefit our mutual customers.”

SK hynix will strengthen its offerings in the server market through collaborations, such as this latest project with Intel. By focusing on 1anm and 1bnm DDR5, the fourth and fifth generation of the 10nm process technology, respectively, SK hynix looks to increase its financial performance and presence in the server market as demand for server DRAMs is expected to rise in the second half of 2023.

[At a Glance] The Intel and SK hynix DDR5 Ecosystem White Paper (Read the full white paper)

• Bandwidth 70%↑⁶, Power Consumption 14.4%↓⁷, Integer Computations 1.59 times↑

The white paper details test data that server customers can use to guide their application of DDR5 in their servers. Highlights include the speed, performance, and power consumption that is attainable when combining DDR5 memory and Xeon.

Figure 1. Comparing the Server Bandwidth of SK hynix’s DDR4 and DDR5

Firstly, server bandwidth⁸ at the same operating speeds of 3,200 megabits per second (Mbps) increased by 20% with DDR5 compared with the previous generation, DDR4. Additionally, the server bandwidth at DDR5’s operating speed of 4,800 Mbps was 70% greater than it was at DDR4’s highest operating speed of 3,200 Mbps⁹. The overall expansion in the server bandwidth is due to the DDR5’s design improvements that minimized internal transfer latency of data and the securing of higher transfer speeds compared to DDR4.

Figure 2. Comparing Operating Speed and Power Consumption of SK hynix’s DDR4 and DDR5

Through the study, SK hynix was also able to confirm that DDR5’s power consumption was 14.4% less than DDR4 due in large part to new technologies such as High-K Metal Gate (HKMG). HKMG is a next-generation process that uses a High-K insulating film inside a DRAM transistor to prevent leakage current and improve its capacitance—the ability to store charge. Semiconductor memory products with HKMG therefore have a higher power efficiency.

Xeon’s built-in accelerators have also shown positive results in tests. Organizations can improve the average performance per watt efficiency for target workloads by up to 2.9 times utilizing the built-in accelerators compared to the previous generation of processors. The combination of these technologies enabled DDR5 and Xeon to achieve an excellent 50% increase in bandwidth and a 14.4% reduction in power usage.

The white paper also shows the computational performance of a system that combines DDR5 and Xeon. The companies used SPEC CPU 2017, a specialized benchmarking program, to compare performances.

Results from the comparison showed that integer computations were 1.59 times faster and floating point computations 1.43 times faster than the previous generation’s system. The performance per watt also saw its efficiency rise 1.22 times for integer computations and 1.11 times for floating point computations compared to the system’s predecessor.

The advanced system also performed well in the Intel Memory Latency Checker (MLC) test, a program that measures memory latency and speed. Compared to the previous generation, the read speed increased by 1.4 times and the read/write speed rose by 1.51 times.

Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries.

¹4th Gen Intel^® Xeon^® Scalable processors: These processors are Intel’s next generation of server CPUs that support PCIe Gen5 and next-generation DDR5 DRAM.

²2.9x average performance per watt efficiency improvement for targeted workloads utilizing built-in accelerators compared to the previous generation.
New Configuration: 1-node, 2x pre-production 4th Gen Intel^® Xeon^® Scalable Processor (60 cores) with integrated Intel In-Memory Analytics Accelerator (Intel IAA), on pre-production Intel platform and software, HT On, Turbo On, Total Memory 1024GB (16x64GB DDR5 4800), microcode 0x2b0000a1, 1×3.84TB P5510 NVMe, Intel^® Ethernet Controller X540-AT2, Ubuntu 22.04.1 LTS, 5.18.12-051812-generic, QPL v0.2.1,accel-config-v3.4.6.4, ZSTD v1.5.2, RocksDB v6.4.6 (db_​bench), tested by Intel November 2022. Baseline: 1-node, 2x production 3rd Gen Intel^® Xeon^® Scalable Processors (40 cores) on SuperMicro SYS-220U-TNR, HT On, Turbo On, SNC Off, Total Memory 1024GB (16x64GB DDR4 3200), microcode 0xd000375, 1×3.84TB P5510 NVMe, Intel^® Ethernet Controller X540-AT2, Ubuntu 22.04.1 LTS, 5.18.12-051812-generic, ZSTD v1.5.2, RocksDB v6.4.6 (db_​bench), tested by Intel November 2022.

³Performance per watt: An indicator of how much computation is performed per watt of power consumed.

⁴Floating point: A concept about real numbers where integers and decimals are represented separately by changing the position of the decimal point to facilitate computation, as opposed to a fixed point where the decimal point is fixed in its original position. For example, if the original real number is 123.485, it can be written in floating points as 1.23485X 10^2, or 0.00123485X10^5.

⁵Total cost of ownership (TCO): The total costs of an asset that includes such as the initial investment, power, facility operations, and maintenance.

⁶Result obtained during simulations by SK hynix performed in December 2022.

⁷Power consumption comparison of DDR4 and DDR5 based on simulations by SK hynix’s power calculator.

⁸Server Bandwidth: The pathway through which data travels. An increase in bandwidth enables more data to be processed more efficiently at once.

⁹Bandwidth comparison based on increase from DDR4’s 3,200 Mbps operating speed to DDR5’s 3,200 Mbps and 4,800 Mbps speeds.

The post SK hynix’s DDR5 Key to Enabling Industry-Leading Performing Data Centers, White Paper Reveals first appeared on SK hynix Newsroom.

• Offers fastest operating speed in DDR5 history, ultra-low power consumption with adoption of HKMG process
• Expects to successfully complete validation of industry-leading 1bnm DDR5
• Mass production of industry’s most advanced 1bnm DDR5 to help improve 2H23 earnings
• 1bnm technology to be applied to high-end products including LPDDR5T, HBM3E in 1H24

Seoul, May 30, 2023

SK hynix Inc. (or “the company”, www.skhynix.com) announced today that it has completed the development of the industry’s most advanced 1bnm, the fifth-generation of the 10nm process technology, while the company and Intel began a joint evaluation of 1bnm and validation in the Intel Data Center Certified memory program for DDR5 products targeted at Intel ® Xeon® Scalable platforms.

The move comes after SK hynix became the first in the industry to reach 1anm readiness and completed Intel’s system validation of the 1anm DDR5, the fourth-generation of the 10nm technology.

The DDR5 products provided to Intel run at the world’s fastest speed of 6.4Gbps (Gigabits per second), representing a 33% improvement in data processing speed compared with test-run products in early days of DDR5 development¹.

¹ DDR5 products for test run in early days of development ran at 4.8Gbps, while the maximum speed of DDR5 stipulated in the JEDEC standards is 8.8Gbps

Besides, with the adoption of high-K metal gate² process, the 1bnm DDR5 products reduce power consumption by over 20% than 1anm DDR5 products.

² HKMG process: A next-generation process that uses a high dielectric constant (K) material in the insulating film of the DRAM transistor to prevent leakage current and improve capacitance. It reduces power consumption, while increasing speed. SK hynix introduced the world’s first HKMG process for mobile DRAM in November and adopted the technology for its 9.6Gbps LPDDR5T mobile DRAM in January 2023

SK hynix emphasized that the development of the latest 1bnm technology will enable the company to provide its global customers with DRAM products that offer both high-performance and performance per watt³.

³ Performance per watt: an indicator of how much computation is performed per watt of power consumed

“SK hynix expects the validation process of the 1bnm DDR5 product with Intel to go smoothly following a successful validation of our 1anm server DDR5 product compatibility with the 4th Gen Intel® Xeon® Scalable processors,” Jonghwan Kim, Head of DRAM Development at SK hynix, said.

“Amid growing expectations that the memory market will start to recover from the second half, we believe our industry-leading DRAM technology, proven again through mass production of the 1bnm process this time, will help us improve earnings from the second half,” Kim said, adding that the 1bnm process will be adopted for a wider range of products such as LPDDR5T and HBM3E⁴ in the first half of 2024.

⁴ HBM3E (HBM3 Extended): HBM3E is the 5^th generation High Bandwidth Memory product, succeeding the previous generations HBM, HBM2, HBM2E and HBM3. SK hynix plans to prepare samples of HBM3E product that runs at 8Gbps data processing speed by the second half and begin mass production in 2024

Intel Vice President of Memory and IO Technologies, Dr. Dimitrios Ziakas said, “Intel has been collaborating with the memory industry to ensure compatibility of DDR5 memory on Intel® Xeon® Scalable platform. SK hynix 1bnm is the first of its generation being targeted for the next Intel® Xeon® Scalable platform” and the Intel Data Center Certified memory program.

Meanwhile, SK hynix also said that additional validation processes to apply its 1anm DDR5, of which the first compatibility test has been already completed, onto the next generation of Intel® Xeon® Scalable platform are also underway.

<History of SK hynix’s developments & accomplishments of DDR5 products>

• Industry’s first launch of DDR5 in October 2020
• Industry’s first shipment of 24Gb DDR5 samples in December 2021
• Industry’s first to get Intel’s validation for server 1anm DDR5 in January 2023
• Industry’s first provision of samples of server 1bnm DDR5 to Intel in April 2023

About SK hynix Inc.

SK hynix Inc., headquartered in Korea, is the world’s top tier semiconductor supplier offering Dynamic Random Access Memory chips (“DRAM”), flash memory chips (“NAND flash”) and CMOS Image Sensors (“CIS”) for a wide range of distinguished customers globally. The Company’s shares are traded on the Korea Exchange, and the Global Depository shares are listed on the Luxembourg Stock Exchange. Further information about SK hynix is available at www.skhynix.com, news.skhynix.com.

Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries.

Media Contact

SK hynix Inc.
Global Public Relations

Technical Leader
Kanga Kong
E-Mail: global_newsroom@skhynix.com

Technical Leader
Joori Roh
E-Mail: global_newsroom@skhynix.com

The post SK hynix Enters Industry’s First Compatibility Validation Process for 1bnm DDR5 Server DRAM first appeared on SK hynix Newsroom.

SK hynix once again proved to be the first and the best when it comes to innovations as it became the world’s first company to successfully develop working samples of the DDR5 MCR DIMM¹, a server DRAM product, in December 2022. This successful development of a sample significantly enhances the performance of the server DRAM. The biggest improvement is that the MCR DIMM breaks away from the traditional idea of focusing solely on the operating speed of individual DRAM units to boost the speed of DDR5. Instead, it adds a customized module to individual DRAM units to increase the speed. The operating speed of the MCR DIMM is over 8 Gbps (gigabits per second), which is at least 80% faster than existing server DRAMs that have a speed of 4.8 Gbps. This makes it the fastest server DRAM in the world.

¹MCR DIMM (Multiplexer Combined Ranks Dual In-line Memory Module): A module product with multiple DRAMs bonded to a motherboard, in which two ranks² (basic information processing units) operate simultaneously, resulting in improved speed.

²Rank: A set of basic data transfer units exported from the DRAM module to the CPU. Usually, 64 bytes of data are transferred to the CPU as a unit.

As SK hynix sees the server memory market as pivotal to overcoming the recent downturn of the semiconductor industry, the company has focused on developing technologies related to server DRAMs. The SK hynix team who achieved innovation through new methods and paths emphasized the importance of challenging oneself, saying: “No matter how difficult it is, opening up new paths is always worthwhile.” This was the motivation for the MCR DIMM team members, Kim Hong Bae, Kim Yeong Jun, and Yi Jong Yun, who committed themselves to developing the leading server DRAM.

▲Figure 1. The members behind the development of the MCR DIMM—Kim Hong Bae (left), Yi Jong Yun (middle),
and Kim Yeong Jun (right)—discussing the server DRAM’s development process.

Server DRAMs are Essential for Future Digital Era’s Infrastructure

Today, society is undergoing drastic changes. Almost every piece of information is generated, recorded, and shared digitally. This is what’s called digital transformation (DT), and the server DRAM is a crucial component of the infrastructure that builds this digital world. Therefore, SK hynix’s development of the MCR DIMM is meaningful in many ways.

The project head, Professional Leader Kim Hong Bae at DRAM Product Planning, emphasized the role of the server DRAM. “You need wider highways and faster cargo vehicles if you want to efficiently transport shipments. We call this logistics infrastructure,” Kim said. “The role of server DRAMs is similar to that of a cargo vehicle. It helps to move data faster and smoother. That is why I think a server DRAM is the core component of the digital world’s infrastructure.”

He continued: “Looking at it from an infrastructure point of view, the importance of the MCR DIMM is considerable. A DRAM that can process data more than 80% faster than existing DRAMs and in a much more stable way has been developed to address the exponentially increasing amount of data nowadays. And considering these performance improvements, this is truly an extraordinary achievement.”

▲Figure 2. “The role of server DRAMs is similar to that of a cargo vehicle. It helps move data faster and smoother,”
said Professional Leader Kim Hong Bae, DRAM Product Planning.

Kim Yeong Jun, a technical leader at DRAM Product Planning, placed great importance on being able to respond to the rapid growth of data that will occur in the near future. “I think the amount of data we will create down the road will increase tremendously. Therefore, the amount of data that DRAMs need to process will also surely increase. What would happen if every household has an 8K TV? In order to supply 8K-level streaming to every home, media servers will have to process an enormous amount of data. It is inevitable that we will need hardware that can handle more data,” Kim said. “The problem is that it will not only be the video field that will develop in such a way. We are currently facing an era of digital transformation where all areas including finance, shopping, travel, culture, and transportation are being digitalized. Eventually, every aspect of an individual’s life will generate data, so servers that process this data will require higher-level systems and hardware. I can confidently say that SK hynix has prepared itself for these future demands.”

Technical Leader Yi Jong Yun at DRAM AE (Application Engineering), who conducted the MCR DIMM test, also showed pride in the successful development. “SK hynix has continued to show a strong presence in the server DRAM market, and the success of the MCR DIMM’s development served as an opportunity to declare once again that our company produces the best server DRAMs,” Yi said. “As my colleagues already mentioned, I am looking forward to the future that the MCR DIMM will make.”

SK hynix Pushes Technological Limits to Lead the Server DRAM Market

The MCR DIMM represents a leap forward in performance, typically unseen in the DRAM sector. It is common to see an operating speed increase of about 800 Mbps (Megabits per second) when developing a new generation of the DDR5 DRAM. For example, if the DRAM offered an operating speed of 4,800 Mbps, the next generation is expected to have a speed of approximately 5,600 Mbps. However, SK hynix made yet another breakthrough by developing the MCR DIMM that boasts an operating speed of over 8,000 Mbps.

▲Figure 3. The operation structure of the world’s fastest server DRAM, the MCR DIMM.

Kim Hong Bae had more to add on the performance innovations of the MCR DIMM. “In comparison to server DRAMs that had a fixed rate of performance enhancement for each generation, server CPUs (Central Processing Unit) were expected to have a performance enhancement rate that was higher than that of DRAMs,” Kim said. “It was critical to prevent a considerable difference between the CPU’s operating speed and the DRAM’s data processing speed, as the DRAM could eventually cause a bottleneck³. So, we achieved a rapid improvement in the MCR DIMM’s performance by making new and unprecedented innovations.”

³Bottleneck: Originally a term to describe traffic disruption typically caused by vehicles waiting for signals or entering narrower roads. In the computer industry, a bottleneck refers to the situation when one component reaches its maximum capability and restricts the performance of other components in the system.

▲Figure 4. “While not changing the way the existing DDR5 DRAM units are used, we designed two ranks—the operation unit of the module—to operate at the same time,” said Technical Leader Kim Yeong Jun at DRAM Product Planning, regarding the MCR DIMM.

Kim Yeong Jun provides a behind-the-scenes explanation of the newly attempted techniques that went into the product development. “In the process of developing the MCR DIMM, we introduced a new concept to increase operating speeds,” he explained. “While not changing the way the existing DDR5 DRAM units are used, we designed two ranks—the operation unit of the module—to operate at the same time. While 64 bytes of data are transmitted in one rank, 128 bytes of data can be transmitted at once by operating two ranks simultaneously. A data buffer⁴ is used for this operation as it combines the 64 bytes of data transmitted in two ranks and creates the collective transmit of 128 bytes.”

He added: “In particular, collaboration with global companies—Intel (U.S.) and Renesas (Japan)—played an important role in this development.” Intel, which develops server CPUs, and Renesas, which develops data buffers for the MCR DIMM, collaborated with SK hynix to create synergy.”

⁴Buffer: A component that is mounted on top of the DRAM module to optimize the performance of the signal transmission between the DRAM and the CPU. It is mainly installed in server DRAM modules that require high performance and stability.

A Challenge that Others Avoided Became a Chance to Innovate

The development of the MCR DIMM was especially difficult because everything from the design to the testing process consisted of methods that no one had ever tried before. Since it was a distinct product developed without a standard, every part of the process was a challenge.

▲Figure 5. “In the case of the MCR DIMM, it was not easy to build a completely new test environment.”, said Technical Leader Yi Jong Yun, DRAM AE, recalling the development of the groundbreaking test program for the MCR DIMM while holding a sample.

The team members who developed the product described the biggest challenges they faced during the whole process. “In the case of the MCR DIMM, it was not easy to build a completely new test environment,” Yi Jong Yun said. “In fact, when developing a new generation of current products, there is a target for performance level. In the case of DDR, the industry expects a performance increase of 800 Mbps for new generations. However, it was difficult to set a target since there were no references or related information in the MCR DIMM’s case. Developing cannot be done with only the concept; it needs a specific target as well. Accordingly, it was difficult to create a test program and environment to bring our concept into life. I am proud that SK hynix was able to overcome these hurdles and set up the foundation to lead in the server DRAM market by successfully developing the MCR DIMM.”

As for Kim Yeong Jun, he recalls initially proposing the product to the company. “The MCR DIMM is a new concept that has never existed before, so I remember working hard to convince colleagues on why we should develop this product and why clients would want to buy it. We needed to convince others that it was worth breaking away from the existing DRAM development methods to go with a new development method which is a risk.” Kim said. “Ultimately, we are still defining the MCR DIMM market since it is not fully solidified yet. Since the project has not been completely finalized and as there is still time left until its mass production, greater efforts are needed in the future. When the development and mass production of MCR DIMMs are completed and widely adopted in the market, I am really looking forward to the customers’ reactions and the changes that will occur in the server DRAM industry.”

Kim Hong Bae also expressed his anticipation for the wide use of MCR DIMMs down the road. “We are realizing how important data centers and servers are these days. And through our experiences, we know that if servers do not function, many aspects in our daily life stop. In fact, server facilities are a key piece of modern-day infrastructure,” Kim said. “For those of us who have become accustomed to the digital world, data centers and servers have become indispensable, and SK hynix is committed to building better data centers and servers for everyone. I hope we can contribute to creating a better future by developing more innovative products, starting with the MCR DIMM.”

While the members take much pride in the fact that their product has improved performance by more than 80% compared to existing products, they admit that there is still much work to be done. As they continue to develop the MCR DIMM, the team members of SK hynix, who have achieved innovation by tackling challenges that only a few have ever dared to try, will not shy away from taking the road less traveled in the future as well.

The post Interview With the SK hynix Team Behind MCR DIMM, “the Best Server DRAM” first appeared on SK hynix Newsroom.

SK hynix Inc. (or “the company”, www.skhynix.com) announced today that its DDR5 product for servers using 1anm, the fourth generation of the 10nm process technology, has been validated on the 4th Gen Intel® Xeon® Scalable processor (formerly codenamed Sapphire Rapids) for the first time in the industry’s history.

“The validation of the 1anm DDR5 compatibility by Intel for its newest processor that supports DDR5 for the first time is monumental,” SK hynix said. “We will seek a fast turnaround in the semiconductor memory industry by actively responding to the growing server market through DDR5, which is already in mass production.”

The validation of the company’s 1anm DDR5 product, which adopts 1anm technology using the EUV lithography process, is for 4th Gen Intel® Xeon® Scalable processors, Intel’s latest server CPU launched on January 10th.

The 4th Gen Intel® Xeon® Scalable processor has been cited as a key to a turnaround in the industry, given that the launch of a next-generation server CPU requires server replacement and thus, results in a rapid increase in demand for high-performance memory chips. Experts predict that DDR5, expected to meet customers’ such needs, will soon become the flagship product in the server DRAM market.

SK hynix’s DDR5 delivers an outstanding performance per watt^* and carbon emissions reduction effect to server customers as it reduces power consumption by up to 20% compared to DDR4, while boosting performance by 70% or more.

^*Performance per watt: an indicator of how much computation is performed per watt of power consumed.

SK hynix also announced that its 1ynm DDR5, the second generation of the 10nm process technology, has also successfully completed the validation of memory compatibility with Intel. SK hynix expects provision of various DDR5 products including 16Gb and 24Gb storage capacities to boost sales of server DRAM.

“The company is in close cooperation with a number of customers for wider adoption of DDR5 following the launch of the 4th Gen Intel® Xeon® Scalable processor and will strengthen its leadership in the ever-growing server market,” said Sungsoo Ryu, Head of DRAM Product Planning at SK hynix.

“Intel has been working diligently with SK hynix, JEDEC and the industry to bring DDR5 to life from initial inception to the scalable, reliable memory subsystem at the heart of our latest processor technology,” said Dr. Dimitrios Ziakas, Vice President of Memory and I/O Technologies at Intel. “The 4th Gen Intel® Xeon® Scalable processor takes advantage of DDR5 enhanced memory features to deliver the bandwidth, performance and scaling capacity needed by our data center customers across a vast array of workloads and applications.”

Meanwhile, SK hynix, in collaboration with Intel, published a DDR5 white paper, which includes the features of DDR5 and the superior performance of the company’s 1anm DDR5. The company expects the white paper to be used as a reference for server customers who plan to adopt SK hynix’s DDR5 in the future.

<SK hynix DDR5 Development Timeline>

– Launch of industry’s first DDR5 in Oct. 2020
– Shipment of industry’s first 24Gb DDR5 samples in Dec. 2021
– Obtainment of industry’s first Intel validation of 1anm DDR5 for servers in Jan. 2023

Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries.

About SK hynix Inc.

SK hynix Inc., headquartered in Korea, is the world’s top tier semiconductor supplier offering Dynamic Random Access Memory chips (“DRAM”), flash memory chips (“NAND flash”) and CMOS Image Sensors (“CIS”) for a wide range of distinguished customers globally. The Company’s shares are traded on the Korea Exchange, and the Global Depository shares are listed on the Luxembourg Stock Exchange. Further information about SK hynix is available at www.skhynix.com, news.skhynix.com.

Media Contact

SK hynix Inc.
Global Public Relations

Technical Leader
Kanga Kong
E-Mail: global_newsroom@skhynix.com

Technical Leader
Joori Roh
E-Mail: global_newsroom@skhynix.com

The post SK hynix Obtains Industry’s First Validation for 1anm DDR5 DRAM on the 4th Gen Intel® Xeon® Scalable Processor first appeared on SK hynix Newsroom.

• Vice Chairman Park Jung-ho meets with top executives of Qualcomm to discuss broad collaboration opportunities
• SK hynix to continue to seek collaboration with global tech players beyond borders, industries

Seoul, January 6, 2023

SK hynix Inc. (or “the company”, www.skhynix.com) announced today that its Vice Chairman and co-CEO Park Jung-ho discussed ways to strengthen cooperation with global tech companies including Qualcomm Technologies on the sidelines of the CES 2023 in Las Vegas.

Park, along with SK hynix President and co-CEO Kwak Noh-Jung and other executives, met with Qualcomm President and CEO Cristiano Amon on January 4^th in Las Vegas.

The leaders’ discussions included a wide range of topics such as the broader future industry involving the semiconductor.

Qualcomm Technologies, the world’s largest provider of application processor for smartphones, has been expanding its business into automotive and consumer, industrial and networking IOT.

“The leaders met at the right time when Qualcomm Technologies is expanding its realm of business,” SK hynix said. “We expect the meetings to pave the way for more active exchanges between the companies and provide our industry-top memory solutions.”

Park said that SK hynix’s cooperation with global ICT companies will continue beyond borders and industries. “We will explore various business opportunities with our technology through cooperation with global tech companies.”

Figure 1. SK hynix’s Vice Chairman and co-CEO Park Jung-ho (right) met with Qualcomm’s President and CEO Cristiano Amon to discuss strengthening their technical partnerships on January 4th (local time) in Las Vegas, the host city of CES 2023.

Figure 2. Top executives including SK hynix’s Vice Chairman and co-CEO Park Jung-ho (right) and Qualcomm’s President and CEO Cristiano Amon met on January 4^th in Las Vegas on the sidelines of CES 2023 to discuss expanding cooperation between the two companies.

About SK hynix Inc.

SK hynix Inc., headquartered in Korea, is the world’s top tier semiconductor supplier offering Dynamic Random Access Memory chips (“DRAM”), flash memory chips (“NAND flash”) and CMOS Image Sensors (“CIS”) for a wide range of distinguished customers globally. The Company’s shares are traded on the Korea Exchange, and the Global Depository shares are listed on the Luxembourg Stock Exchange. Further information about SK hynix is available at www.skhynix.com, news.skhynix.com.

Media Contact

SK hynix Inc.
Global Public Relations

Technical Leader
Kanga Kong
E-Mail: global_newsroom@skhynix.com

Technical Leader
Joori Roh
E-Mail: global_newsroom@skhynix.com

The post SK hynix’s Vice Chairman Park Jung-ho Meets with Qualcomm CEO at CES 2023 for Greater Collaboration in Semiconductor Business first appeared on SK hynix Newsroom.

• Operation of world’s fastest DDR5 with expected data transfer rate of greater than 8Gbps
• SK hynix leads development of MCR DIMM through collaboration with Intel and Renesas
• Efforts to seek technological breakthrough, solidify leadership in server DRAM market continue

Seoul, December 8, 2022

SK hynix Inc. (or “the company”, www.skhynix.com) announced today that it has developed working samples of DDR5¹ Multiplexer Combined Ranks² (MCR) Dual In-line Memory Module, the world’s fastest server DRAM product. The new product has been confirmed to operate at the data rate of minimum 8Gbps, and at least 80% faster than 4.8Gbps of the existing DDR5 products.

MCR DIMM is an achievement coming from out-of-the-box thinking with an aim to improve the operation speed of DDR5. Challenging the prevailing concept that the operation speed of DDR5 relies on that of DRAM chip itself, engineers sought to find a way to improve the speed of modules instead of chips for development of the latest product.

SK hynix designed the product in a way that enables simultaneous operation of two ranks by utilizing the data buffer³ installed onto the MCR DIMM based on Intel’s MCR technology.

¹Double Data Rate (DDR), a DRAM standard mainly used for servers and client applications, has been developed up to the fifth generation. The MCR DIMM is a module product with multiple DRAM chips attached to the board and improved speed as a result of two ranks operating simultaneously.
²Rank: A collection of basic transfer units of the data sent to CPU from DRAM module. A rank typically refers to 64 bytes of data to be transferred to central processing unit as a bundle.
³Buffer: A component that optimizes signal transmission performance between DRAM and CPU. Mainly installed onto modules for servers requiring high performance and reliability.

By enabling simultaneous operation of two ranks, MCR DIMM allows transmission of 128 bytes of data to CPU at once, compared with 64 bytes fetched generally in conventional DRAM module. An increase in the amount of data sent to the CPU each time supports the data transfer rate of minimum 8Gbps, twice as fast as a single DRAM.

A close collaboration with business partners Intel and Renesas was key to success. The three companies worked together and cooperated throughout the process from the product design to verification.

SK hynix’s Head of DRAM Product Planning Sungsoo Ryu said that the achievement was possible thanks to convergence of different technologies. “SK hynix’s DRAM module-designing capabilities were met with Intel’s excellence in Xeon processor and Renesas’ buffer technology,” Ryu said. “For a stable performance of MCR DIMM, smooth interactions between the data buffer and processor in and out of the module are essential.”

Data buffer transmits multiple signals coming from the module in the middle and server CPU accepts and handles the signals coming though the buffer.

“SK hynix delivered another technological evolution for DDR5 by developing the world’s fastest MCR DIMM,” Ryu said. “Our efforts to find technological breakthroughs will continue as we seek to solidify our leadership in the server DRAM market.”

Dr. Dimitrios Ziakas, Vice President of Memory and IO Technologies at Intel, said that Intel and SK hynix are leading the way on memory innovation and the development of high performance, scalable DDR5 for servers, along with other key industry partners.

“The technology brought forward comes from years of collaborative research between Intel and key industry partners to produce significant increases in deliverable bandwidth for Intel Xeon processors,” he said. “We look forward to bringing this technology to future Intel Xeon processors and supporting standardization and multigenerational development efforts across the industry.”

Vice President and General Manager of Memory Interface Division at Renesas Sameer Kuppahalli said that Renesas’ development of the data buffer is a culmination of three years of intensive effort spanning from concept to productization. “We’re proud to partner with SK hynix and Intel in the endeavor to realize this technology into a compelling product,” he said.

SK hynix expects the market for the MCR DIMM to expand driven by high performance computing that will take advantage of the increased memory bandwidth. SK hynix is planning to bring the product to mass production in the future.

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