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		<title>SK hynix’s Kangwook Lee Becomes Industry’s First Packaging Executive to Win Dawon Kahng Award</title>
		<link>https://skhynix-news-global-stg.mock.pe.kr/sk-hynix-kangwook-lee-becomes-industry-first-packaging-executive-to-win-dawon-kahng-award/</link>
		
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		<pubDate>Wed, 19 Feb 2025 06:00:48 +0000</pubDate>
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					<description><![CDATA[<p>Kangwook Lee proudly holds the Dawon Kahng Award &#160; Kangwook Lee, head of Package Development at SK hynix, received the 8th Dawon Kahng Award1 in the Device and Process category at the 32nd Korean Conference on Semiconductors (KCS), held on February 13 in Gangwon-do Province, South Korea. 1Dawon Kahng Award: Presented by KCS, this award [&#8230;]</p>
<p>The post <a href="https://skhynix-news-global-stg.mock.pe.kr/sk-hynix-kangwook-lee-becomes-industry-first-packaging-executive-to-win-dawon-kahng-award/">SK hynix’s Kangwook Lee Becomes Industry’s First Packaging Executive to Win Dawon Kahng Award</a> first appeared on <a href="https://skhynix-news-global-stg.mock.pe.kr">SK hynix Newsroom</a>.</p>]]></description>
										<content:encoded><![CDATA[<p><img loading="lazy" decoding="async" class="aligncenter wp-image-16948 size-full" title="Kangwook Lee proudly holds the Dawon Kahng Award" src="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2025/02/21020430/SK-hynix_%EC%9D%B4%EA%B0%95%EC%9A%B1-%EB%8B%B4%EB%8B%B9-%EA%B0%95%EB%8C%80%EC%9B%90%EC%83%81-%EC%88%98%EC%83%81-%EC%86%8C%EC%8B%9D_01.png" alt="Kangwook Lee proudly holds the Dawon Kahng Award" width="1000" height="563" /></p>
<p class="source" style="text-align: center;">Kangwook Lee proudly holds the Dawon Kahng Award</p>
<p>&nbsp;</p>
<p>Kangwook Lee, head of Package Development at SK hynix, received the 8<sup>th</sup> Dawon Kahng Award<sup>1</sup> in the Device and Process category at the 32nd Korean Conference on Semiconductors (KCS), held on February 13 in Gangwon-do Province, South Korea.</p>
<p style="font-size: 14px; font-style: italic; color: #555;"><sup>1</sup><strong>Dawon Kahng Award</strong>: Presented by KCS, this award recognizes one individual in the Device/Process category and another in the Circuit/System category for their contributions to the semiconductor industry.</p>
<p>Established in recognition of the esteemed Dr. Dawon Kahng, who developed the MOSFET<sup>2</sup> and floating gate<sup>3</sup>, this award has traditionally been given to renowned professors specializing in the front-end process such as the semiconductor device and process fields. However, the 2025 award is garnering significant attention as, for the first time, the winner of the Device and Process category is a business leader in the back-end process field, specifically in semiconductor packaging.</p>
<p style="font-size: 14px; font-style: italic; color: #555;"><sup>2</sup><strong>Metal-oxide-semiconductor field-effect transistor (MOSFET)</strong>: A transistor that utilizes the effect of an electric field through a metal-oxide-semiconductor (MOS) structure.<br />
<sup>3</sup><strong>Floating gate</strong>: A structure in flash memory that retains electronic values even without power.</p>
<p>To learn more about this monumental achievement, the SK hynix Newsroom spoke with Lee about his win and his contributions to semiconductor packaging.</p>
<h3 class="tit">A Prestigious Award Recognizing SK hynix&#8217;s Status &amp; Prowess</h3>
<p>Lee, a leading expert in semiconductor packaging technology, brings over 27 years of research and development experience in the fields of 3D packaging<sup>4</sup> and integrated circuits having worked in global academia and industry roles. Earning his Ph.D. from Tohoku University in Japan in 2000, he first worked at Rensselaer Polytechnic Institute in the U.S. as a postdoctoral researcher and later as a professor at Tohoku University before joining SK hynix in 2018. After entering the company, Lee developed South Korea’s first TSV<sup>5</sup> technology and paved the way for the success of SK hynix’s AI memory by applying MR-MUF<sup>6</sup> to HBM2E— the third generation of HBM<sup>7</sup>.</p>
<p style="font-size: 14px; font-style: italic; color: #555;"><sup>4</sup><strong>3D packaging</strong>: A packaging method that vertically connects chips, allowing data to be sent and received directly between the chips with technologies such as through-silicon via (TSV).<br />
<sup>5</sup><strong>Through-silicon via (TSV)</strong>: A type of vertical interconnect access (via) that passes through a silicon die, enabling the stacking of layers and signal transmission between them.<br />
<sup>6</sup><strong>Mass reflow-molded underfill (MR-MUF)</strong>: A process in which a liquid protective material is injected between the spaces of stacked chips before hardening to protect the circuits. MR-MUF offers more efficient and effective heat dissipation compared to the method of laying a film material between each chip.<br />
<sup>7</sup><strong>High Bandwidth Memory (HBM)</strong>: A high-value, high-performance product that vertically connects multiple DRAMs to dramatically increase the data processing speed compared to existing DRAMs. There are five generations of HBM, starting with the original HBM and followed by HBM2, HBM2E, HBM3, and HBM3E—an extended version of HBM3.</p>
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<p class="source" style="text-align: center;">Lee is a recognized leader in semiconductor packaging technology</p>
<p>&nbsp;</p>
<p><strong>“Research on TSV-based 3D packaging has led to commercialized products in various fields, with HBM being the most notable example,” he explained. “SK hynix’s proprietary packaging technology, MR-MUF, has enabled the stable mass production of highly complex HBM with high manufacturing yield and scalability, while also improving key characteristics such as thermal dissipation performance. This technology was first applied to HBM2E and contributed to SK hynix’s rise as the global AI memory leader. Through continuous technological advancements, MR-MUF has been successfully applied to HBM3 and HBM3E, further strengthening SK hynix’s HBM market leadership.&#8221;</strong></p>
<p><img loading="lazy" decoding="async" class="aligncenter wp-image-16955 size-full" title="The Dawon Kahng Award recognizes outstanding talents in the semiconductor industry" src="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2025/02/21020505/SK-hynix_%EC%9D%B4%EA%B0%95%EC%9A%B1-%EB%8B%B4%EB%8B%B9-%EA%B0%95%EB%8C%80%EC%9B%90%EC%83%81-%EC%88%98%EC%83%81-%EC%86%8C%EC%8B%9D_08.png" alt="The Dawon Kahng Award recognizes outstanding talents in the semiconductor industry" width="1000" height="563" /></p>
<p class="source" style="text-align: center;">The Dawon Kahng Award recognizes outstanding talents in the semiconductor industry</p>
<p>&nbsp;</p>
<p>Lee boasts an impressive list of awards to match his significant achievements. One such honor came in 2024 when he became the first Korean recipient of the <a href="https://news.skhynix.com/sk-hynix-kangwook-lee-wins-ieee-eps-award/"><span style="text-decoration: underline;">IEEE EPS Electronics Manufacturing Technology Award</span></a>. Having now added the Dawon Khang Award to his list of accolades, he revealed the latest award is particularly meaningful for him.</p>
<p><strong>“I am honored to receive an award that holds great significance in the industry,” he said. “Above all, I feel a deep sense of fulfillment as it recognizes SK hynix’s standing and the exceptional capabilities of the Package Development department. Although I’m humbled by this award, I take it as encouragement to contribute even more to advancing the semiconductor industry. I also want to thank the Package Development members for their dedication and hard work.”</strong></p>
<h3 class="tit">Packaging Technology &amp; One-Team Collaboration at the Heart of Semiconductor Innovation</h3>
<p>Reflecting on the award, Lee particularly values the achievement as he became the first industry executive from the packaging field to receive the prize.<br />
<img loading="lazy" decoding="async" class="aligncenter wp-image-16955 size-full" title="Lee has over 27 years of research experience in 3D packaging and integrated circuits" src="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2025/02/21020416/Lee-has-over-27-years-of-research-experience-in-3D-packaging-and-integrated-circuits.png" alt="Lee has over 27 years of research experience in 3D packaging and integrated circuits" width="1000" height="563" /></p>
<p class="source" style="text-align: center;">Lee has over 27 years of research experience in 3D packaging and integrated circuits</p>
<p>&nbsp;</p>
<p><strong>“The paradigm of semiconductor technology advancement is shifting from miniaturization to packaging, elevating the back-end process to an equal standing with the front-end. Companies now play a more critical role in driving innovation than ever before. In other words, packaging technology and companies are at the heart of semiconductor innovation. I believe this award highlights and reinforces this pivotal shift,” he emphasized.</strong></p>
<p>Lee also predicted that packaging technology would become even more important. He explained that the evolution of packaging technology is driving the growth of new industries and that packaging capabilities will be a key factor in determining not only business value but also future survival. “The competition among global companies to secure packaging technology and strengthen semiconductor dominance has already begun,” he said. “The Package Development department will respond to this competition with solid technological expertise and strong ‘one-team’ collaboration.”</p>
<p><strong>&#8220;Package Development members possess a fearless spirit of challenge and an unwavering determination to resolve issues to the very end. This is the foundation of our overwhelming technological prowess,” he stated. “Furthermore, SK hynix’s strong ‘one-team’ culture has been the driving force behind its successful semiconductor innovations. Thanks to this, we were able to successfully implement MR-MUF technology and secure a leading position in the HBM market. Moving forward, the company will continue to pioneer future markets with a spirit of challenge and a collaborative mindset, driving further innovation.&#8221;</strong></p>
<h3 class="tit">Securing Advanced Packaging Technologies by Fostering a Spirit of Challenge</h3>
<p>Lee also shared his two key development plans to respond to future market demands, including advancing HBM packaging technology and securing heterogeneous integration technology based on chiplets<sup>8</sup>.</p>
<p style="font-size: 14px; font-style: italic; color: #555;"><sup>8</sup><strong>Chiplet</strong>: A technology that breaks up chips into functions and connects these separated pieces on a single substrate to enable heterogeneous bonding and integration.</p>
<p><img loading="lazy" decoding="async" class="aligncenter wp-image-16955 size-full" title="Lee aims to meet the demands of next-generation AI systems" src="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2025/02/21020402/Lee-aims-to-meet-the-demands-of-next-generation-AI-systems.png" alt="Lee aims to meet the demands of next-generation AI systems" width="1000" height="563" /></p>
<p class="source" style="text-align: center;">Lee aims to meet the demands of next-generation AI systems</p>
<p>&nbsp;</p>
<p><strong>“We must continue innovating in HBM packaging technology to meet the demands of large-scale, high-performance, and energy-efficient AI systems,” Lee said. “To achieve this, we’re advancing MR-MUF technology and developing next-generation solutions including hybrid bonding<sup>9</sup>. In the medium-to-long term, we plan to implement 2.5D and 3D SiP<sup>10</sup> leveraging chiplet technology to respond to memory-centric<sup>11</sup> needs. Moreover, we aim to enhance chip-to-chip connectivity by employing fan-out wafer-level packaging<sup>12</sup> and hybrid bonding. This will enable us to secure advanced packaging technologies that improve performance and energy efficiency.”<br />
</strong></p>
<p style="font-size: 14px; font-style: italic; color: #555;"><sup>9</sup><strong>Hybrid bonding</strong>: A technology that directly connects chips without bumps when stacking, enabling thinner chips and high-layer products. SK hynix is looking at both Advanced MR-MUF and hybrid bonding methods for 16-layer and higher HBM products.<br />
<sup>10</sup><strong>System-in-Package (SiP)</strong>: A packaging technology that integrates multiple integrated circuits into a single unit, enabling it to perform most or all functions of an electronic system.<br />
<sup>11</sup><strong>Memory-centric</strong>: A computing environment in which memory plays a key role in processing and managing data across devices.<br />
<sup>12</sup><strong>Fan-Out Wafer-Level Packaging (FO-WLP)</strong>: A back-end packaging technology for chips involving directly attaching data input/output (I/O) pads to the chip’s outer area, eliminating the need for a substrate.</p>
<p>Ultimately, Lee’s strategy is to create a “total semiconductor solution,” integrating devices, processes, designs, and packaging to strengthen SK hynix’s competitive advantage.</p>
<p>Regarding this, he encouraged team members to keep pushing forward. &#8220;If we continue to demonstrate a spirit of challenge and a ‘one-team’ mindset, we can fully achieve our goals. By challenging ourselves and working together, we can develop technologies that go beyond simply creating ‘good’ products and truly change the world. I will actively support the team as they pave new paths as first movers.”</p>
<p>Looking back on his career, Lee underscored the importance of nurturing new talent. <strong>“Having received the prestigious Dawon Kahng Award, following my IEEE EPS Award, I feel a great sense of responsibility,” he said. “I want to foster an environment where younger engineers feel encouraged to take on new challenges. As an expert in the semiconductor industry, I will do my best to elevate SK hynix’s and South Korea’s global semiconductor competitiveness.”</strong></p>
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<p><a href="https://linkedin.com/showcase/skhynix-news-and-stories/" target="_blank" rel="noopener noreferrer"><img loading="lazy" decoding="async" class="size-full wp-image-15776 aligncenter" src="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2025/02/10074354/SK-hynix_Newsroom-banner_1.png" alt="" width="800" height="135" srcset="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/09/13015412/SK-hynix_Newsroom-banner_1.png 1000w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/09/13015412/SK-hynix_Newsroom-banner_1-680x115.png 680w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/09/13015412/SK-hynix_Newsroom-banner_1-768x130.png 768w" sizes="(max-width: 800px) 100vw, 800px" /></a></p><p>The post <a href="https://skhynix-news-global-stg.mock.pe.kr/sk-hynix-kangwook-lee-becomes-industry-first-packaging-executive-to-win-dawon-kahng-award/">SK hynix’s Kangwook Lee Becomes Industry’s First Packaging Executive to Win Dawon Kahng Award</a> first appeared on <a href="https://skhynix-news-global-stg.mock.pe.kr">SK hynix Newsroom</a>.</p>]]></content:encoded>
					
		
		
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		<title>SK hynix’s Kangwook Lee Becomes First South Korean to Win IEEE EPS&#8217; Electronics Manufacturing Technology Award</title>
		<link>https://skhynix-news-global-stg.mock.pe.kr/sk-hynix-kangwook-lee-wins-ieee-eps-award/</link>
		
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		<pubDate>Fri, 31 May 2024 01:00:59 +0000</pubDate>
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					<description><![CDATA[<p>Kangwook Lee is the first South Korean to receive IEEE EPS&#8217; Electronics Manufacturing Technology Award &#160; Kangwook Lee, head of Package Development at SK hynix, has become the first South Korean to receive the Electronics Manufacturing Technology Award from the IEEE1 Electronics Packaging Society (EPS) Awards Program. Lee was presented with his award for 2024 [&#8230;]</p>
<p>The post <a href="https://skhynix-news-global-stg.mock.pe.kr/sk-hynix-kangwook-lee-wins-ieee-eps-award/">SK hynix’s Kangwook Lee Becomes First South Korean to Win IEEE EPS’ Electronics Manufacturing Technology Award</a> first appeared on <a href="https://skhynix-news-global-stg.mock.pe.kr">SK hynix Newsroom</a>.</p>]]></description>
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<p class="source" style="text-align: center;">Kangwook Lee is the first South Korean to receive IEEE EPS&#8217; Electronics Manufacturing Technology Award</p>
<p>&nbsp;</p>
<p>Kangwook Lee, head of Package Development at SK hynix, has become the first South Korean to receive the Electronics Manufacturing Technology Award from the IEEE<sup>1</sup> Electronics Packaging Society (EPS) Awards Program.</p>
<p>Lee was presented with his award for 2024 at the annual ceremony hosted by EPS, a technical society of IEEE, on May 30 in Denver, Colorado. First presented in 1996, the Electronics Manufacturing Technology Award recognizes outstanding achievements in the field of electronic and semiconductor packaging.</p>
<p>In explaining the selection of Lee, EPS highlighted his various contributions at global academic institutions and within the semiconductor industry for over 20 years. These contributions include research and development in 3D packaging<sup>2</sup> and integrated circuits, which led to the development of the AI memory HBM<sup>3</sup> and advancement in its manufacturing technology.</p>
<p style="font-size: 14px; font-style: italic; color: #555;"><sup>1</sup><strong>Institute of Electrical and Electronics Engineers (IEEE):</strong> Based in the U.S., IEEE is the most prestigious professional association for electrical engineering, electronics engineering, and other related disciplines.<br />
<sup>2</sup><strong>3D packaging:</strong> A packaging method that vertically connects chips, allowing data to be sent and received directly between the chips. Through silicon-via (TSV) is one of the more well-known 3D packaging methods.<br />
<sup>3</sup><strong>High Bandwidth Memory (HBM):</strong> A high-value, high-performance product that revolutionizes data processing speeds by connecting multiple DRAM chips with through-silicon via (TSV).</p>
<p>An expert in semiconductor packaging technology, Lee received his Ph.D. from Japan’s Tohoku University in 2000 after completing his thesis on &#8220;Three-dimensional Integration Technology for Integrated Micro-Systems&#8221;. He later worked as a postdoctoral researcher at Rensselaer Polytechnic Institute in the U.S. before returning to Tohoku University as a professor. Since joining SK hynix in 2018, he has been in charge of wafer-level package (WLP) development and has been developing packaging technology for HBM products.</p>
<p>In particular, Lee successfully introduced a packaging technology called MR-MUF<sup>4</sup> during the development of the third generation of HBM—HBM2E—in 2019. This development helped cement SK hynix’s dominance in the HBM market and its position as the leading AI memory provider.</p>
<p style="font-size: 14px; font-style: italic; color: #555;"><sup>4</sup><strong>Mass Reflow-Molded Underfill (MR-MUF):</strong> A process technology that injects protective material to harden the spaces between stacked semiconductor chips to protect the circuitry. It is more efficient than laying down a film-like material after each chip stack while also effective at dissipating heat.</p>
<p>&#8220;I am very pleased to receive this award which officially recognizes SK hynix’s outstanding achievements in the HBM field,&#8221; said Lee. &#8220;As the AI era gets into full swing, advanced packaging technology is becoming an increasingly important solution. Going forward, SK hynix will continue to drive technological innovations in the age of AI.&#8221;</p>
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