SK hynix announced HBM3’s development in October 2021, with the company beginning to mass produce the product in June 2022. SK hynix will also provide HBM3 for NVIDIA systems that are expected to begin shipping in the third quarter of 2022.

How did the company maintain its leadership position in this market, and what lessons did it implement from developing the previous generations of HBM products?

HBM1 – First Mover from the Get-go

When HBM was developed as a memory solution optimized for high-level computing performance (HCP), it offered a new paradigm on solving the memory bottleneck as it aimed to increase capacity and bandwidth simultaneously. SK hynix jointly developed the world’s first TSV (Through Silicon Via) HBM product with AMD in 2014. The two companies also teamed up to develop high-bandwidth 3-D stacked memory technologies and related products.

HBM1’s operating frequency is around 1,600 Mbps, the VDD (drain power voltage) is 1.2V, and the die density is 2Gb (4-hi). The product had a higher bandwidth than the DDR4 and GDDR5 products, while using less power in a substantially smaller form factor, benefitting bandwidth-hungry processors such as GPUs (graphics processing units).

HBM2 – Second Generation Home Improvements

In the second generation HBM2, released in 2018, a key improvement was the Pseudo Channel mode.  This mode divides a channel into two separate 64-bit I/O sub-channels, as well as providing 128-bit prefetch per memory read and write access for each sub-channel. The mode optimizes memory accesses and lowers latency, resulting in higher effective bandwidth.

Other improvements included lane remapping modes for both hard and soft repairs of lanes, as well as anti-overheating protection. The newer technologies, alongside HBM2’s higher effective bandwidth, give it a higher energy efficiency than HBM1 at its data-rate.

HBM2E – Round Three Game Changer

SK hynix was also the first memory vendor to begin mass producing HBM2E, an extended version of HBM2. The HBM2E development team’s determination to raise the product’s specifications at the planning stage played a critical role in helping SK hynix to maintain its leadership position. The product was released two years after HBM2 in 2020, with technological updates and more applications, as well as a faster speed and higher capacity than HBM2.

The product’s 16Gb die density was double that of HBM2, achieved by vertically stacking eight 16Gb chips via TSV technology. At the time of its release, HBM2E had the industry’s fastest memory at 3.6Gbps in I/O speed and processing 460GB of data per second using 1,024 I/Os. HBM2E also has 36% better heat dissipation than HBM2.

HBM3 – Maintaining Leadership into the Fourth Generation

SK hynix continued maintaining its leadership status with HBM3, which was the world’s first of its kind when the company developed it in 2021. HBM3 has 1.5 times HBM2E’s capacity from 12 DRAM die stacked to the same total package height, enabling it to power capacity-intensive applications such as AI and HPC.

A significant addition in HBM3 compared to previous generations is a custom-designed on-die ECC (Error Correcting Code), which uses pre-allocated parity bits to check and correct errors in the data received. The code also allows DRAM to self-correct errors within cells, enhancing device reliability.

HBM3’s 16-channel architecture runs at 6.4Gbps, double that of HBM2E and currently the fastest in the world. This makes HBM3 and other HBM products an indispensable component of digital life, such as HBM products becoming a prerequisite for the Levels 4 and 5 of driving automation in autonomous vehicles.

SK hynix’s HBM development is also an important component of the company’s ESG efforts, with each generation of the product designed to consume less power than the previous one. For example, HBM3 runs at lower temperatures than HBM2E at the same level of operating voltage, enhancing the stability of the server system environment, and increasing cooling capacity.

After celebrating its HBM3 achievements, the development team has already moved onto the next step, cooperating with clients, and receiving feedback on the product. Predictions are also already out for HBM4, which could be more widely used in areas such as high-performance data centers, super computers, and artificial intelligence.

The HBM market also continues its steady growth, with the volume of data transmission increasing rapidly in the 5G era and a 2021 report by Omdia predicting that the market will generate $2.5 billion in revenue by 2025. SK hynix is looking to secure its leadership in the market by continuing to take its HBM products to the next level and maintaining its position as not only a “first mover”, but also a “solution provider”.

The post Continuing to Make HBM History: The Story of SK hynix’s HBM Development first appeared on SK hynix Newsroom.

High Bandwidth Memory (HBM) has evolved once again to its latest incarnation since its debut in 2013. SK hynix began mass-producing HBM3, the 4th generation of HBM, after completing the customer evaluation process seven months after its development. This has allowed the company to maintain its leadership position in the market, which it has held since producing the product’s previous version, HBM2E.

We met the team behind HBM3’s development and mass production, including Wangsu Kim (IPM Planning), Myeong-Jae Park (HBM Design), Kwi Wook Kim (Graphic&HBM Development PI), Jinwoo Park (WLP PKG Product) and Jinwon Huh (HBM/Graphics Enablement). We also took a closer look at the development process and heard the behind-the-scenes story.

The industry’s fastest processing, largest storage and enhanced reliability with error correction code

HBM is a premium memory product that secures more data transmission paths (I/O) than existing DRAM products, which also translates into a high bandwidth. The advantage is that the product processes data very quickly and is also able to send large amounts of data simultaneously.

HBM’s processing speed has increased with each generational upgrade. The per-pin data rate, which was 1Gbps in the first generation HBM, shot up to 6.4Gbps in the fourth generation of HBM. This improvement means that HBM3 is capable of processing 819GB of data per second, equivalent to processing 163 full-HD (5GB) movies in a second and almost twice as fast as HBM2E’s 3.6Gbps capability.

Storage has also increased with each generation. Whilst HBM2E’s maximum storage capacity was 16GB, HBM3 will be available in both a 24GB storage capacity, currently the largest in the industry, and a 16GB product. On-die Error Correction Code (ECC), which self-corrects data errors delivered to DRAM cells, will also improve product reliability.

The ‘Through Silicon Via’ (TSV) technology was critical for SK hynix to achieve all these metrics. TSV technology punches thousands of micro holes on DRAM chips and connects several chips via the electrodes running through these holes to deliver data. This technology enables a faster signal transmission speed, which makes it easier to secure density compared to the existing method of transferring data by connecting chips with external wires.

A key distinguisher between HBM3 and HBM2E is that the product specification (SPEC) itself has been upgraded in the former. An entirely new specification had to be set after it became impossible to improve the processing speed and storage capacity with that of HBM2.

▲Wangsu Kim, Professional Leader at IPM Planning

Wangsu Kim, in charge of HBM3 product planning, explained, “In order to enhance HBM2E’s performance at HBM2’s specification, we needed to increase either the product size or power consumption. Therefore, as we developed HBM3, we set and implemented a new specification that boosted performance whilst maintaining the same conditions as the existing one.”
“We also see the potential to further improve performance within the same specification, in much the same way as we derived HBM2E from HBM2,” he added.

The key to SK hynix’s leadership of the HBM market is ‘airtight, prior preparation’ and the ‘developers’ strong bond’

What was SK hynix’s secret weapon to maintaining its top tier position in the HBM market? The answer, according to the development team members, is ‘thorough preparation ahead of time’ and a ‘team vibe emphasizing co-operation during the development process”.

“The development team got involved right from the product design stage, and we were able to secure the necessary elements and technologies ahead of time,” said Kwi Wook Kim, who oversaw the development of HBM3 devices. “We were able to set our target really high because everyone helped each other regardless of roles, even as we faced challenges during the development process.”

▲Kwi Wook Kim, Professional Leader at Graphic&HBM Development PI

“There was one time when it took us a few months to settle an argument over the micro- unit spacing between cells. After some heated debates during our meetings, we often met up after work to drink together to relieve the tension (laughs). We all did our best in our respective areas, and it was a matter of seeing whether these efforts would translate to the best, most efficient results. All of these processes and the time that we spent spurred us on to develop the best possible HBM3 product.”

The co-operation between the product planning and architecture design teams was particularly important during the process of structuring the HBM3 specification and registering it as an international standard with JEDEC (Joint Electron Device Engineering Council).

“When we developed HBM3, we had to set the technology trend as a ‘first mover’ without the benefit of any prior products as a reference. Therefore, we had to set the product’s own specification whilst simultaneously standardizing it with JEDEC,” said Myeong-Jae Park, Professional Leader at HBM Design.

▲Myeong-Jae Park, Professional Leader at HBM Design

“The hardest part of the process was setting the specification while broadening the design scope. At one point, we were unable to implement the specification that we had negotiated with JEDEC during the development process, so we had to re-set it and persuade JEDEC to accept the changes. We braced ourselves for every possibility as we prepared for the JEDEC negotiations and a marathon meeting with the product design department. We even wrote manuals scripting out various possibilities during the negotiation process down to the smallest detail. We even mentally prepared ourselves for the worst-case scenario, that we would have to start from scratch, but fortunately the negotiations with JEDEC were successful.”

Developing the product as per the design also proved challenging, with many trials and errors along a path previously untrodden. Since HBM3 has the narrowest pitch (minimum center-to-center distance between interconnect lines), it was the most difficult to develop from a technical standpoint among SK hynix’s products. A defect previously unseen by the packaging department in previous pitches also made the development process more challenging.

“It is very time and energy-consuming to investigate what is causing these defects by changing minor motional mechanisms and figures individually, via a lot of trial and error, at the experiment level,” said Jinwoo Park, Professional Leader at WLP PKG Product, who was in charge of developing the package. “Various teams, including design, device, quality assurance, and GSM, also helped in the experiment process and provided a lot of assistance, which was a big help,” he added.

▲Jinwoo Park, Professional Leader at WLP PKG Product

“I used to get stressed as the development deadline approached but I had not yet identified which part was causing the defect, even after hundreds of experiments. Whenever I felt stuck, I would take a quick break and a colleague from another development team left a cup of coffee on my desk with a note that said, “Hang in there”. My colleagues’ encouragement helped me to overcome the challenges when I was ready to give up. To pay it forward, I often came up with new ideas for experiments whilst reviewing data that could help other development teams.”

SK hynix secures a competitive advantage thanks to the world’s first HBM3 mass-production… “The next goal is to maintain the No.1 position”

HBM is installed as a System in Package (SiP) in the client’s products, and it takes a long time for the client to check the product’s operations and performance during the validation stage. However, once the checking process is complete, it opens the door to nabbing an advantageous position at the early market stage and gaining a head start over the competition. SK hynix’s HBM2E products were able to secure a huge market share during the initial stages of their market entry thanks to this distinctive market characteristic.

“SK hynix once again gained a competitive advantage by developing and mass-producing HBM3 alongside HBM2E for the first time in the world,” said Kwi Wook Kim. “Although the market situation will certainly also play a role, this pre-emption effect could last for a considerable period of time,” he predicted.

▲Jinwon Huh, Professional Leader at HBM/Graphics Enablement

Although it would be easy to rest on their laurels, the HBM3 developers are already preparing to take the next step.

“It is essential for us to co-operate with clients such as SoC (System on Chip) companies before completing development of these HBM products. The quality control departments’ continuous feedback, along with those from the development team, is the key to achieving the best performance and quality,” said Jinwon Huh, Professional Leader at HBM/Graphics Enablement, who oversees HBM3 validation.

“In order to maintain our competitiveness in the HBM market, we will do our best to resolve any issues occurring during product certification quickly, and further contribute to expanding the market for HBM products.”

SK hynix is also planning to share its successful experience as a ‘first mover’ of the HBM market at the corporate level.

“The most important asset that we have from developing HBM3 is the experience of being a ‘first mover’ leading the market,” said Wangsu Kim. “We hope this experience plays a big role in the success of SK hynix’s future development by spreading a positive company culture.”

“The AI era is also approaching much faster than expected. The technology is already impacting various sectors, as evidenced by the emergence of real-time translation services and various curation services. Implementing these technologies requires massive amounts of data and increasingly larger AI model sizes. We expect that clients will increasingly demand technology that enables saving data more efficiently and quickly. HBM is the solution that can meet this demand at the highest technology level currently in existence.”

“HBM3 has nearly double HBM2E’s bandwidth. This means that once HBM3 is commercialized, service quality will improve by more than two times the current metric. SK hynix will also ramp up efforts to develop memory solutions with even better performance. The belief that memory solutions can be improved rapidly and continuously opens a plethora of opportunities for IT companies. These technologies will also increase the quality of life, and we want to change the world by developing them.”

The post “First Movers on a Path That No-one Has Taken Before” – Meet the Engineers Leading the World’s First Mass-production of HBM3 first appeared on SK hynix Newsroom.

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In recent years, efforts to produce the first fully autonomous vehicle have really shifted into gear. While self-driving cars once seemed like futuristic inventions straight from a sci-fi classic, today, most standard vehicles are already utilizing some form of technology that classifies them alongside autonomous vehicles. Features like auto-braking and rear-view cameras, also known as advanced driver-assistance systems (ADAS), mark some of the first steps toward fully autonomous, self-driving vehicles.

Innovation in semiconductor technology is responsible for much of the recent development in the autonomous vehicle industry. And without semiconductors, the ongoing efforts to reach full autonomy would prove fruitless.

But, where is the line drawn between assistance and autonomy? The engineers at SAE International created the industry standard for making such distinctions. Its six-tier system classifies vehicles beginning at level 0, where a car may issue warnings to a driver, through to level 5, at which time there is no intervention needed whatsoever by the driver. Breaking the barrier between assistance and autonomy is the driving force behind innovation in the automotive industry today.

Becoming driver-“less” with more

The automotive industry is primed to conquer levels 4 and 5 of the SAE International scale but still has a few hurdles to clear. Beyond the complications of ethics and legislation, many of the key challenges lie in technology. Surmounting the existing limitations in connectivity, sensing, and judgment will only be possible with the support of faster, denser, more advanced semiconductors.

Engineers need to reevaluate a vehicle’s ability to connect with the world around it. Not only are our streets packed with pedestrian and road signs, but also with multiple machines and other technology enabling the smooth operation of traffic management. Establishing a connection with these other smart elements of the road enables an autonomous vehicle to better model its environment. When channels are established between vehicles (vehicle to vehicle, V2V) and between a vehicle and fixed infrastructure (vehicle-to-infrastructure, V2I) the result is that a vehicle can signal its presence and planned behavior. Additionally, it can share environmental information, like icy roads, among local users as well as process warnings and information distributed via V2I channels including an impending change to a traffic light. While v2i and v2v technology already exist, the burden of reliable connectivity limits its application, especially on rapidly moving vehicles.

Sensing presents yet another challenge in parallel. While connection establishes a link between smart technologies on the road, sensors like LiDAR and RADAR help vehicles to identify and classify the various obstacles and elements in our road systems. A vehicle that has achieved level 5 autonomy must be able to organize and understand its environment in real-time regardless of environmental conditions or other variables like low- or impaired visibility. The development of CMOS as a part of a dynamic system of sensors will be critical to establishing a reliable and steadfast sensing system even more detailed and expansive than human vision itself.

But, what good is all this information if the vehicle can’t make the right decision? Overcoming judgment and decision-making challenges still requires significant development in the world of AI and machine-learning. Our roads are dynamic environments, and their conditions are ever-changing. Therefore, the data collected in these environments mimics the same dynamic and turbulent characteristics.

Autonomous vehicles not only need to make quick work of processing this data, but they also need to be able to utilize and store it as an input to multiple simultaneous computing operations. At the cornerstone of all this data management and processing will be innovative semiconductor memory with increased processing power and storage capacity supporting the configuration and reference of each piece of crucial, potentially life-saving data.

All roads lead to innovation

In support of the overarching goals of the autonomous vehicle industry to create safer, greener roads for all, SK hynix has devoted countless hours and resources to push the envelope in automotive-grade semiconductor technology. Its dedicated automotive teams are conceptualizing and developing the semiconductor and chip technology responsible for increased processing power, data storage, and speed, ensuring the reliable and safe operation of autonomous vehicles for years to come.

In 2020, SK hynix began producing the industry’s fastest high-bandwidth memory chip, HBM2E. DRAM of this caliber supports supercomputing with ultra-fast densities and speeds. This remarkable technology is responsible for enabling the simultaneous computations required of AI for lightning-fast road response. It allows vehicles to assess information from multiple sources to complete operations in parallel as a mimic of the human mind. Just as a brain uses millions of neurons to process driving decisions, autonomous vehicles will rely on advanced DRAM like HBM2E to evaluate and respond to their own on-road experiences.

SK hynix’s HBM products will be capable of processing data even more quickly; such advancements will support the implementation of essential machine learning algorithms, enabling an autonomous vehicle to continually learn and improve its understanding of the road and the results of its own decisions.

SK hynix also offers solutions like eMMC 5.1, an advanced, managed NAND flash memory. Automotive NAND flash technology supports the critical function of information storage. It is essential that fully autonomous vehicles are able to intake information from multiple sources including data from sensors and semiconductors like eMMC 5.1. This technology will be relied upon for storing sensing and map data for the proper operation of advanced algorithms allowing vehicles to identify, classify, and save important details about elements of the road environment.

Bringing driver-less technology to life is about more than just convenience. Filling our roads with autonomous vehicles has various and broad implications including improvements to safety, efficiency, and mobility. SK hynix seeks to use technology to improve the world around us and contributing to the development of the autonomous vehicles is only one of the many ways it does so. It’s SK hynix’s commitment to research, development, and leadership within the industry that is making the future of fully automated vehicles a safe and reliable one.

The post Let’s Hit the Road: How Autonomous Vehicles are Making “10 and 2” Driving Obsolete first appeared on SK hynix Newsroom.

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The world’s fastest “HBM2E” is not definitely a coincidence. In 2013, SK hynix succeeded in developing a high bandwidth memory (HBM) for the first time in the industry by applying through silicon via (TSV) technology to DRAM. SK hynix has set a new milestone in DRAM history by dramatically increasing the processing speed through HBM. Since then, SK hynix continued to develop and has started the full-scale mass-production of HBM2E, only ten months after the Company announced the development of the new product in August last year.

SK hynix’s HBM2E supports over 460GB (Gigabyte) per second with 1,024 I/Os (Inputs/Outputs) based on the 3.6Gbps (gigabits-per-second) speed performance per pin. It is the fastest DRAM solution in the industry, being able to transmit 124 FHD (full-HD) movies (3.7GB each) per second. The density is 16GB by vertically stacking eight 16Gb chips through TSV (Through Silicon Via) technology, and it is more than doubled from the previous generation (HBM2).

One Step beyond the HBM2, Industry’s Fastest DRAM

From the birth and development of HBM to the current HBM2E, there is IPM Planning Team under DRAM Product Planning who was involved in all processes and have poured their sweat and passion into them.

(From left) Technical Leader (TL) Yeon Seung Jung, TL Jungsoo Park, TL Younsoo Kim, TL Changyong Ahn, Project Leader (PL) Wangsu Kim, TL Hyunmin Lee, TL Eunji An at IPM Planning Team

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Q. What is the role of Product Planning in the semiconductor development process?

Project Leader (PL) Wangsu Kim It proactively predicts the technological changes of the semiconductor industry and verify it through various external activities and communication with customers. Then, it proposes product specifications, such as characteristics and development schedule of products to derive company-wide consensus on the product development lineup. In other words, we work on planning how to commercialize products required for customers.

▲ PL Wangsu Kim

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Q. What was the background of planning HBM2E?

Technical Leader (TL) Younsoo Kim Although SK hynix developed HBM for the first time in the world, it didn’t maintain its leadership in following generations. That’s why all team members were so determined to raise the product specifications when planning the HBM2E. HBM2E is a product between HBM2 and HBM3, and was designed for faster speed, higher capacity, and lower power than HBM2. HBM2E has recently begun the mass-production and is receiving a good response in the market, which makes us feel very proud.

▲ TL Younsoo Kim

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Q. HBM2E is the industry’s fastest DRAM that supports over 460 GB per second based on the 3.6 Gbps speed performance per pin. It also supports a large capacity of 16 GB, which is more than doubled from the previous generation. What was the key to achieving this high level of performance?

TL Younsoo Kim To explain it more precisely, the explanation of HBM should come first. The reason why HBM could achieve higher performance than the existing DRAM is that the structure for exchanging the data between chips has been fundamentally changed. TSV technology stacks multiple DRAM chips vertically and creates column-shaped paths that penetrate the entire silicon wafer thickness to deliver commands and data. In the previous structure, wires for signal transmission had to be structured long. This means that the new technology allows the length of the wire to become shorter, which enables faster transmission and lowers the probability of missing any signals.

TL Hyunmin Lee A high-level micro-process technology was necessary for realizing the world’s best performance product. There were many hurdles in the early stage of development, but after a lot of discussions, we could select and apply the essential technology for HBM2E. Because all departments worked hard together, we could succeed in mass-production of the best performance product that outstrips the industry.

Q. What products is HBM2E equipped in and what fields do you expect it to be utilized in?

TL Jungsoo Park HBM belongs to the premium product line. It is a memory solution optimized for high-performance computing (HPC), supercomputers, and artificial intelligence (AI) which all require high-level computing performance. In addition, the demand for HBM is expected to rise further, as the 5G era, where the data transmission volume is rapidly increasing, arrives.

Communication with Customers as “First Mover’, not “Fast Follower”

It is important to develop the “best” technology “for the first time”, but above all, it eventually becomes meaningful only when it meets the market’s needs. It takes a long time from development to mass-production, but it is essential to take time for discussing future technologies with customers beforehand. To achieve this, IPM Planning Team should closely communicate with customers.

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Q. What were the trials and errors during the development process? What was the secret to overcoming the challenges?

PL Wangsu Kim Since HBM is a semi-finished product, it cannot be operated independently. This is the reason why a process to mount it on customers’ systems is required to verify that there’s no problem in operation. We expected that this product verification process would take about three to six months, but it actually took almost a year due to many variables appearing. It was due to the lack of experience. Based on this experience, all members worked hard together aiming for higher specifications in HBM2E. Therefore, the company could start the mass-production of it only after a short time.

▲ TL Eunji An

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Q. PL Kim mentioned that communication with customers is important. How do you work for this?

TL Eunji An The biggest role of my team is to understand the needs of customers and market, and to plan products that meet those needs. Even if we make a product with a performance of 100%, it is meaningful only when customers need that level of performance. Before planning a product, we take time to discuss with customers specifically what kind of performance is needed and when to supply it. As all this is about the future, there are different opinions sometimes, in terms of supply and demand. When this happens, we try to find a compromise by explaining internal opinions to customers and vice versa. It’s never easy to coordinate internal and external opinions, but it’s dynamic and enjoyable.

Q. Were there any troubles when coordinating opinions with customers? How was the reaction of them?

PL Wangsu Kim When a defect of the product is found during the verification process, we revealed it to customers to find a solution together, rather than just trying to solve it internally. Being proactive as a “first mover” instead of “fast follower” led to good results. We were able to reflect customers’ requests in a short time and reached an agreement by immediately conveying the limitations that arise during the development to the customers. I think these great results were from smooth internal and external communication.

HBM2E Becomes the Core of 4th Industrial Revolution

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Q. What does HBM2E mean for SK hynix?

TL Hyunmin Lee When you launch a product, you see the size or the prospect of the market. HBM2E is a product that sees the latter. Its main applications are the 4th industrial revolution’s key industries such as supercomputers, AI, and 5G networks. Since it is a high-performance product, we can’t say that the market size is large yet, but it can be said that it is a very promising product when considering the growth potential of such industries.

TL Younsoo Kim “World’s best” is not just flowery words, but a truth. As SK hynix’s identity “Technology Innovator for a Better World” suggests, I think the fact that it succeeded in mass-producing the world’s fastest DRAM raised its self-esteem to the next level, as a technology company.

Q. What is the next step of SK hynix that is continuously innovating technologies for the first and the best? Please tell us about SK hynix’s future plans and goals.

PL Wangsu Kim Based on the success of HBM2E, it is now time to move on to HBM3. Currently, the Joint Electron Device Engineering Council (JEDEC), which is an international semiconductor standardization organization, is discussing to establish the standards for HBM3 products. All employees of SK hynix, including Product Planning, are making great efforts so that SK hynix’s HBM3 can become a leading product in the industry like HBM2E. Based on the support of many people, I believe that SK hynix will be able to produce the world’s best HBM product once again.

¹HBM2E: An extended version of the 2nd generation HBM

The post Behind-the-scenes Story of “HBM2E”, the Fastest DRAM in History first appeared on SK hynix Newsroom.

SK hynix Inc. (or ‘the Company,’ www.skhynix.com) announced that it has started the full-scale mass-production of high-speed DRAM, ‘HBM2E’, only ten months after the Company announced the development of the new product in August last year.

SK hynix’s HBM2E supports over 460GB (Gigabyte) per second with 1,024 I/Os (Inputs/Outputs) based on the 3.6Gbps (gigabits-per-second) speed performance per pin. It is the fastest DRAM solution in the industry, being able to transmit 124 FHD (full-HD) movies (3.7GB each) per second. The density is 16GB by vertically stacking eight 16Gb chips through TSV (Through Silicon Via) technology, and it is more than doubled from the previous generation (HBM2).

HBM2E boasts high-speed, high-capacity, and low-power characteristics; it is an optimal memory solution for the next-generation AI (Artificial Intelligence) systems including Deep Learning Accelerator and High-Performance Computing, which all require high-level computing performance. Furthermore, it is expected to be applied to the Exascale supercomputer – a high-performance computing system which can perform calculations a quintillion times per second – that will lead the research of next-generation basic and applied science, such as climate changes, bio-medics, and space exploration.

“SK hynix has been in the forefront of technology innovation that contributes to human civilization with achievements including the world’s first development of HBM products,” said Jonghoon Oh, Executive Vice President and Chief Marketing Officer (CMO) at SK hynix. “With the full-scale mass-production of HBM2E, we will continue to strengthen our presence in the premium memory market and lead the fourth industrial revolution.”

Annotation

■ HBM (High Bandwidth Memory)
– High performance, high bandwidth memory products that adopt TSV technology to dramatically accelerate data processing speed over traditional DRAMs.

■ TSV (Through Silicon Via)
– An interconnecting technology that connects the upper and lower chips through thousands of fine holes on DRAM chip.
– Delivers data, commands, and currents through column-shaped paths that penetrate the entire silicon wafer thickness after stacking multiple DRAM chips on the buffer chip.
– Up to 30% decrease in size and up to 50% decrease in power consumption over existing packaging methods.

■ Standards for data process speed conversion
– 1GB = 8Gb
– 3.6Gbps per pin with 1024 data I/Os (Inputs/Outputs) = 3686.4Gbps
– 3686.4Gbps / 8 = 460.8GB/s (Gb -> GB conversion)

Figure 1. SK hynix starts mass-production of high-speed DRAM, ”HBM2E”

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Figure 2. SK hynix employees posing for the commemorative photo celebrating the mass-production of HBM2E

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About SK hynix Inc.

SK hynix Inc., headquartered in Korea, is the world’s top tier semiconductor supplier offering Dynamic Random Access Memory chips (“DRAM”), flash memory chips (“NAND flash”) and CMOS Image Sensors (“CIS”) for a wide range of distinguished customers globally. The Company’s shares are traded on the Korea Exchange, and the Global Depository shares are listed on the Luxemburg Stock Exchange. Further information about SK hynix is available at www.skhynix.com, news.skhynix.com.

Media Contact

SK hynix Inc.
Global Public Relations

Technical Leader
Jaehwan Kevin Kim
E-Mail: global_newsroom@skhynix.com

Technical Leader
Sejin Julia Yoo
E-Mail: global_newsroom@skhynix.com

Technical Leader
Eun Suk Yixi Lee
E-Mail: global_newsroom@skhynix.com

The post SK hynix Starts Mass-Production of High-Speed DRAM, ”HBM2E” first appeared on SK hynix Newsroom.

The post SK hynix’s Memory – Beyond History to the Future first appeared on SK hynix Newsroom.

But this tedious waiting ends soon. As 5G service begins in earnest and computing technologies keep developing, the popularization of “cloud gaming” is going to be realized soon. Cloud gaming allows users to play games right away with any internet-connected device, without any installation process. It means that gamers’ “Brave New World” is finally opening.

New Gaming Environment Using “Cloud Service”

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Cloud gaming is a kind of streaming service¹. All a user needs to enjoy the game is an input device and a displaying device to show the gaming screen. Data required for playing the game is stored within the central server, instead of individual devices. Data processing and calculation to execute input orders are also done in the central server, where the data is installed.

There are two general methods of streaming a cloud game. “Video” streaming method transmits the gaming data saved in the server to individual devices via a relay point called “thin client”; the data is also transmitted from individual devices to the server through this when saving as well. As thin clients play only a role of facilitating the data transmission between the server and the user, small memory capacity is enough for them to function. The other method is the “file” streaming method, which first uses the minimum amount of cache to start the game initially, and then downloads the required data as the game proceeds.²

In other words, in a cloud gaming service, transmitting the control value entered by the user with a controller, and displaying the received game execution results on the screen are all that users’ devices do. Cloud gaming is a totally different mechanism compared to the one in previous games where all the tasks were done in users’ devices. It allows users to enjoy high-spec games without a high-end computing system or a large storage capacity to install the data.

One of the other strengths of cloud gaming is that users can enjoy the same gaming content on different devices anytime, anywhere. It is because both the installation and additional updates are all done in servers in real time. For example, users can continue playing the game on their mobile device that was previously played on a PC, by receiving the previous gaming data via servers. Also, with cloud gaming service, video games that were previously available only on consoles can be played on tablet devices as well.

It is expected that the latest online games or virtual reality (VR) games that were previously only available on high-spec PC can be played on a TV or a smartphone, simply by attaching a tiny, network-connected console device.

Gaming Industry’s “Survival Competition” Triggered by Semiconductors, and the Acceleration of Profit Model Changes Led by Cloud Gaming

The gaming industry expects that as cloud gaming provides innovative gaming environments, it will become the next-gen gaming platform. Some even think that cloud gaming is the only way to survive in the fierce competition in the gaming industry, because the game graphics are improving and the volume of data required for a game is getting larger, all of which require more and more hardware specs to run a game.

For the first time in the industry, “Final Fantasy 15” which was released last year required storage capacity exceeding 100GB. Along with that, the latest video game “Call of Duty: Modern Warfare” cannot even run without more than 175GB of storage space (according to the official minimum specification). A game requiring more than 200GB storage space will soon appear in the near future. This means that most storage capacity of a 256GB SSD would be needed to store the data of one single game.

This situation encourages users to purchase a separate storage device or a high-spec PC in order to play certain games, and it’s not favorable for both users and video game companies which want to sell more game packages to a larger number of users.

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In particular, the appearance of the new graphic technology called “Ray tracing” is expected to be the crucial turning point. Ray tracing literally tracks back rays to light sources from the viewpoint (“camera”) in order to calculate how rays interfere with objects that the graphic engine aim to visualize. It is the more advanced method of graphics processing because instead of simply visualizing the surface of the objects which our eyes see, the processing unit “simulates” lighting environment surrounding the objects and as a result displays them as they look in the real life.³

In August 2018, NVIDIA unveiled new graphics processing unit (GPU) – GeForce RTX based on Turing architect which supports ray tracing graphics rendering, enhancing the graphics quality in video games to the actual real life level. The problem is that the realization of ray tracing in a gaming console is not that easy, unlike in a PC where Ray Tracing can be realized simply by adopting NVIDIA’s GeForce RTX series graphics card. While the price of a console is around USD 400, the price range of GeForce RTX is approximately from USD 400 to 1,000. Considering the profit structure of the current gaming console industry, it is not easy to equip a ray tracing-capable graphics card on a gaming console.⁴ This means global video game companies focusing on gaming consoles are now in a situation where they have to seek for a new breakthrough.

The field that is considered as a breakthrough is the cloud gaming service. Through the IR Day 2019 in May, Sony unveiled the next-generation PlayStation (PS), which can realize ray tracing technology, and announced its strategies for cloud gaming in the future. The main point was that it will reinforce PS4’s remote play function, adding a role of a small-sized home data center to the next-gen PS console. There are a number of video games which used to be exclusive on PS consoles, but Sony now plans to allow users to enjoy these video games on different devices, by connecting the PS console with other devices such as PCs and smartphones via network.

Likewise, at the world’s largest video game exhibition “E3 2019” in June, Microsoft also presented its cloud gaming technology called “Project xCloud,” with which users can play high-resolution, high-capacity Xbox games on a smartphone without any download and installation process. As Microsoft has been already operating Azure server in 140 countries and 56 regions, a high level of stability is expected. In South Korea, Microsoft has been providing a test service since October last year, through a partnership with SK Telecom.

Global IT Big Players Join the Battle to Dominate the Growing Cloud Gaming Market

It is expected that this kind of paradigm change would offer a new opportunity to global IT companies which have been providing cloud services for a long time. It is because they can utilize their excellent data server infrastructure with no extra investment, which they have established for the existing business. For example, IT companies with little relation to the gaming industry such as Google and Amazon are taking aggressive actions in the cloud gaming industry.

Google started to provide a cloud gaming platform service based on its web browser (Chrome), called Stadia, from November 19th, in North America and 19 countries in Europe. The biggest strength of Stadia is Google’s IT infrastructure. In the market, it is pointed out that Google has more competitive advantages compared to its competitors in terms of its capability for operating servers, as Google operates diverse services from web search engine, video streaming service (YouTube), to its own cloud service.

Another IT company with high expectations in the cloud gaming industry is Amazon, which provides a live video streaming service called Twitch. Amazon is also one of the global top cloud business operators. In 2017, Amazon took over GameSparks, a cloud gaming service provider in England and Ireland. Early last year, its plan for launching a cloud gaming platform was unveiled through a local media outlet, and the industry also expects that Amazon’s new cloud gaming platform will be launched in 2020.

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It is expected that the size of the cloud gaming market will grow very rapidly. According to the report announced in April 2019 by the global market information provider IHS Markit, the size of the cloud gaming market was USD 387 million (KRW 470 billion) in 2018, and that it will reach USD 2.5 billion (KRW 3.04 trillion) in 2023, by over six times.

“5G Network Innovation,” the Key to the Popularization of Cloud Gaming

Since early 2000, the gaming industry has been focusing on the development of cloud gaming service to dominate the market in advance. In terms of technology, the first cloud gaming technology was presented by G-cluster at E3 in 2000. In terms of service, an early-stage cloud gaming service presented by Onlive in 2010 is considered to be the first one.

However, cloud gaming services in the early stage lacked competitiveness to be popularized. The latency occurred in certain internet environment, causing the delayed responses to users’ input. Another problem was the low video resolution during gameplay due to the need for compression of transmitted data.⁵ Especially, in the case of online games where multiple users access to the same network, network issues were frequent. Expensive service fees were another obstacle for popularization of the early cloud gaming service as well.

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Nonetheless, with the commercialization of 5G technology, a new era for cloud gaming has arrived. The minimum internet data transfer rate required for cloud gaming service is approximately 10Mbps.6) In theory, 4G network environment with peak rate of 1Gbps, latency of 10ms, and user-experience rate of 10Mbps is sufficient for the operation of cloud gaming services. However, when it comes to the user-experience gaming environment, 4G network based cloud gaming is not sufficient compared to the previous gaming mechanism which runs video games utilizing local data installed in the individual device.

On the contrary, 5G network environment supports peak rate of 20Gbps, latency of 1ms, and user-experience rate of 100Mbps, enabling cloud gaming to be operated smoothly. Specifically, 5G supports one-tenth of latency compared to 4G, which is critical in user order input/output delay issues. It is expected that a real-time gaming environment can be established with 5G. Considering the actual gaming environment where multiple users are connected to one single server, this gap is even more significant.

5G and “Memory Semiconductors,” Putting the Finishing Touch to Cloud Gaming

Once the cloud gaming service is commercialized, one single server must be able to process numerous subscribers’ game data at once. While it depends on the number of subscribers, the semiconductor industry is expecting that hundreds of Zeta FLOPS⁷ of data will be generated in the cloud gaming service a day around 2021 to 2022.

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To process the enormous amount of data, data servers usually utilize a High Bandwidth Memory (HBM). While the number of data passages (input/output, IOs) in the current DRAM is 4, 8, or 16 at most, HBM provides 1,024 IOs. This means that HBM can calculate a large volume of data at once, contributing to improving the data processing rate in a server.

Byoungjin Jung, Technical Leader (TL) of PC Client / Embedded at DRAM Product Planning at SK hynix said, “In data centers, adoption of DRAMs over 1,024 IOs such as HBM products will be expanded. While DDR4 will be utilized as main products in general, the shift to DDR5 is expected in a few years.”

In the course of processing game data on a server, the role of graphic DRAMs which help data processing in an accelerator is very important. As a kind of GPU, an accelerator has multiple cores so that it can execute multiple calculations simultaneously, unlike a central processing unit (CPU) where data is processed in high speed with one single core. With this feature, accelerators are mainly used for big data or artificial intelligence (AI) technologies recently. Furthermore, they are playing a key role in processing a large volume of data in cloud servers.

Graphic DRAMs store required data whilst calculations are made in each core within an accelerator, then receive and transfer the calculated data. The performance of existing GDDR6, or even below GDDR6 level is totally enough to process the calculations required for cloud gaming service.

Whan-young Choi, TL of Graphic / Auto at DRAM Product Planning said, “As graphic DRAM’s performance improves, a larger volume of data can be saved at once, and the time required for reading and writing the data can be shortened. The future technological development will be focused on enhancing the processing efficiency within the same amount of physical space.”

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Memory semiconductors are also essential for establishing a 5G network environment, which is one of the prerequisites for the cloud gaming service. Network-specified DRAMs are equipped to the individual network device, storing packet data while the device system decides where to transfer certain packet data and which one to process first, and calculates them.

“To rapidly transfer the data calculated within the network system, a DRAM of a relatively high bandwidth is necessary. Also, as the DRAM must function in a wireless environment, efforts to reduce the power consumption should be made as well,” said Byoungjin Jung “Accordingly, it is anticipated that more than 256 IOs for each system will be required, and for this, 4CH products of LPDDR lineup or customized LPDDR products specialized in securing IOs should be crucial.”

¹A service which transfers and plays multimedia files such as audio (music) or video files in real time by utilizing networks
²“Content Industry Trend of the U.S.: Current Status and Outlook of the U.S. Cloud Gaming”, Korea Creative Content Agency (2019)
³Yoon-ku Kwon and Hee-seok Jeong, “Korea Investment & Securities Co., Ltd. Global Company Issues Next Big Thing: Cloud Gaming Industry”, Korea Investment & Securities Co., Ltd. (2018)
⁴Yoon-ku Kwon and Hee-seok Jeong, “Korea Investment & Securities Co., Ltd. Global Company Issues Next Big Thing: Cloud Gaming Industry”, Korea Investment & Securities Co., Ltd. (2018)
⁵In-ae, Jang, “Global Cloud Gaming Market Trend with the Arrival of 5G Era”, National IT Industry Promotion Agency (2019)
⁶“Global Gaming Industry Trend: Influence of 5G on Gaming Industry and 5G Policies by Major Countries”, Korea Creative Content Agency (2019)
⁷Floating-Point Operations per Second (FLOPS) is the number of operations made in floating-point levels in one second. In this context, it is used as a unit representing the volume of data processed. Zeta is a unit representing 1 sextillion (10²¹).

The post “Cloud Gaming” – Play Your Game Anytime, Anywhere! first appeared on SK hynix Newsroom.

Speeding towards the future of innovation, teams at SK hynix are often focused on the years to come – rather than on those that have passed. It is milestone moments like the end of a decade that offer us a unique opportunity to pause and reflect on our accomplishments and achievements.

As the decade draws to a close, SK hynix takes a look back at the 10 breakthrough moments in chronological order that defined it – and that will continue to define our future.

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1. Full-scale mass production of 16nm NAND flash(November 2013)

In order to actively respond to the needs of its customers, SK hynix started the full-scale mass production of 16nm 64Gb (Gigabit) MLC (Multi Level Cell) NAND Flash. This innovation brought the industry’s thinnest process technology and was more cost competitive due to its smaller chip size. The announcement began SK hynix’s reputation to bring forth a competitive NAND portfolio with high reliability and endurance.

2. Development of the world’s first next-generation mobile memory LPDDR4(December 2013)

At the end on 2013, SK hynix took large steps to heighten its technology leadership by developing the world’s first 8Gb LPDDR4 product with 20nm-class technology. LPDDR4 was the next generation mobile DRAM interface, which was on the process of standardization at that time, and gave customers ultrahigh speed and low power consumption. In fact, the product ran two times faster and does so at lower voltage than of its existing LPDDR3.

3. Development of the world’s first, highest density 128GB DDR4 module(April 2014)

SK hynix made a significant advancement in the ultrahigh density server market with the announcement that it had developed the world’s first and highest density of 128GB (Gigabytes) module based on 8Gb DDR4 using its advanced 20nm-class technology. This module has double density compared to the company’s existing 64GB by taking advantage of TSV (Through Silicon Via) technology. This product helped cement the company’s reputation on providing premium DRAM with high density, ultrahigh speed, and low power consumption.

4. Development of the world’s highest density 16GB NVDIMM(October 2014)

In late 2014, SK hynix announced that it had developed the world’s highest density 16GB NVDIMM (Non-Volatile DIMM) based on 4Gb DDR4 using its advanced 20nm-class technology. By combining DRAM, NAND Flash and the controller in a single module, this product was able to send DRAM data to NAND Flash, whose density was two times bigger than the DRAM, in an unanticipated power loss, thus saving and restoring data safely. Ahead of mass production, SK hynix provided samples to several customers and the product got attention from corporations developing servers and operating systems in need of higher stability.

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5. Launch of the world’s first, highest density 8GB LPDDR4X(January 2017)

SK hynix launched 8GB LPDDR4X mobile DRAM, the world’s highest density in the LPDDR4X standard, using its state-of-the-art dual channel 16Gb chips aimed to suit the upcoming flagship smartphone lineups. This technology allowed mobile device users to maximize their experiences and was expected to be included in various applications such as high-end laptops and automotive electronics.

6. Introduction of the world’s highest 72-layer 3D NAND Flash(April 2017)

In 2017, SK hynix unveiled the industry’s first 72-Layer 256Gb 3D NAND Flash based on its TLC (Triple-Level Cell) arrays and own technologies. This innovation stacked 1.5 times more layers than the already widely available 48-Layer 3D NAND, achieving 30% more productivity. 3D NAND is widely used in AI (Artificial Intelligence), big data and cloud storage. With this achievement, SK hynix secured the industry’s finest 3D NAND product portfolio, solidifying its business competence in NAND memory solutions.

7. Launch of the world’s first “CTF-based 96-layer 4D NAND Flash”(November 2018)

SK hynix was the first in the industry to combine the 3D CTF (Charge Trap Flash) design with PUC (Peri. Under Cell) technology. This 96-Layer 512Gb “CTF-based 4D NAND Flash” based on its TLC arrays reduced more than 30% of chip size and increased bit productivity per wafer by 49% compared to the company’s 72-layer 512Gb 3D NAND. It also provided a 30% higher write and 25% higher read performance. This achievement marks a milestone for the company’s NAND Flash business as a platform for developing future products.

8. Demo of the industry’s first ZNS-based SSD solution for data centers(March 2019)

SK hynix began 2019 with a strong first quarter when the company demonstrated the industry’s first ZNS (Zoned Namespaces) SSD solution at the 2019 OCP Global Summit in San Jose, CA. The ZNS SSD boasted 30% improvement in speed and reliability compared to the existing SSD, as well as more than four
times longer lifetime, making it suitable for the next-gen data centers. SK hynix plans to launch commercial products in the first half of 2020.

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9. Mass production of the world’s first 128-layer 4D NAND(June 2019)

In another major milestone this year, SK hynix started mass-producing world’s first 128-Layer 1Tb (Terabit) TLC NAND, the highest vertical stacking and highest density for a TLC NAND Flash chip. This feat was accomplished only eight months after the company previously announced the 96-Layer 4D NAND last year. The new NAND Flash chip has significantly improved profitability with 40% higher productivity and 60% better investment efficiency, targeting high-capacity mobile and enterprise SSD customers.

10. Development of the world’s fastest High Bandwidth Memory, HBM2E(August 2019)

Earlier this year, SK hynix developed the world’s fastest high bandwidth memory, HBM2E. As the DRAM technology here supports 460GB per second (3.6Gbps per Pin) data processing speed performance, the product is expected to be adopted by high-end machine learning, supercomputers and artificial intelligence. The new HBM2E boasts approximately 50% higher bandwidth and 100% additional capacity compared to the previous HBM2. It will strengthen SK hynix’s leadership in the premium DRAM market.

If we had to sum up the progress of the memory industry – and the continued improvement of SK hynix’ products – over the past 10 years, we would say: smaller, better, faster. From 2013’s mass production of the 16nm NAND flash to 2017’s introduction of the world’s highest 72-layer 3D NAND Flash, to 2019’s development of the world’s fastest HBM2E, we’ve delivered reduced chip sizes, ultrahigh speeds, and higher-quality experiences to our clients around the world.

While no one knows for certain what the next decade will bring, we certainly can say that the innovations of SK hynix will be at its core.

The post A Decade of Innovation: SK hynix Looks Back at its Top Advancements 10 Years of Trailblazing & Industry “Firsts” first appeared on SK hynix Newsroom.

Through-Silicon-Via (TSV) in memories has emerged as an efficient foundational technology for capacity expansion and bandwidth extension. It is a technology where vias are perforated through the entire silicon wafer thickness, in order to form thousands of vertical interconnections from the front to the back-side of the die and vice versa. In the earlier days, TSV was regarded merely as a packaging technology, simply replacing wire-bondings. But over the years, it has become an essential tool to scale performance and density of DRAMs. Today, there are two main use cases in the DRAM industry, where TSVs have been successfully productized to overcome capacity and bandwidth scaling limitations. These are 3D-TSV DRAM and High-Bandwidth-Memory (HBM).

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High density memories such as 128 and 256GB DIMMs (16Gb based 2rank DIMMs with 2High and 4High X4 DRAMs) are also adopting 3D-TSV DRAMs in addition to traditional Dual-Die-Packages (DDP) having wire-bonded die stacks. In 3D-TSV DRAMs, 2 or 4 DRAM dies are stacked on top of each other, where only the bottommost die is connected externally to the memory controller. The remaining dies are interconnected through many TSVs internally providing Input/Output (I/O) load isolations. Compared to DDP structures, such architecture allows higher pin speeds through decoupling of I/O loadings, and lower power consumption by eliminating unnecessary duplication of circuit components across the stacked dies.

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On the other hand, HBM has been primarily created to bridge the bandwidth gap between the system- on-a-chip (SoC) high bandwidth demands and maximum bandwidth supply capabilities of main memories. For example, in AI applications, bandwidth demands per SoC, particularly in training applications, can exceed a few TB/s which cannot be satisfied with conventional main memories. A single main memory channel with 3200Mbps DDR4 DIMMs can provide only 25.6GB/s bandwidth. Even the most advanced CPU platforms with 8 memory channels can provide only 204.8GB/s. On the other hand, 4 HBM2 stacks around a single SoC can provide >1TB/s bandwidth, capable of bridging their bandwidth gaps. Depending on applications, HBMs can be used either stand-alone, as a cache or as the first tier in a two-tier memory.

HBM is an in-package memory where it is integrated with a SoC through a silicon interposer inside the same package. This allows it to overcome the maximum number of data I/O package pin limitations, which would otherwise exist in conventional off-chip packages. HBM2, which has already been deployed in actual products, consists of 4 or 8-high stacks of 8Gb dies and 1024 data pins running at 1.6~2.4Gbps each. This results in 4 or 8GB density and 204~307GB/s bandwidth per HBM stack.

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SK hynix has always been committed to maintaining industry leadership in both HBM and high-density 3D-TSV DRAM products. Recently, SK hynix announced the successful development of the HBM2E device, an extended version of HBM2, which reaches higher density of up to 16GB and bandwidth of 460GB/s per stack. This was made possible through the increase of DRAM die density to 16Gb and achieving 3.6Gbps per pin speed over 1024 data IOs at 1.2V supply voltage. SK hynix is also in the process of expanding line-ups of 128~256GB 3D-TSV DIMMs to satisfy the needs of its customers for higher density DIMMs.

TSV technology has now reached its maturity to some extent, being able to build state-of-the-art products such as HBM2Es with thousands of TSVs. In the future, however, decreasing the TSV pitch¹/diameter/aspect-ratio² and the die thickness, while still maintaining high assembly yields, will become more challenging and essential for continued future device performance and capacity scaling. Such improvements will allow decreased TSV loadings, reduced TSV relative die size portions, and the extended number of stacks beyond 12Highs while still maintaining the same total physical stack height. SK hynix will continue to be dedicated to positioning itself at the forefront of memory technology leadership through endless innovations in TSV products and technology.

¹The distance between two vias
²The ratio of the height to the diameter of the TSV

The post Creating New Values in DRAM Using Through-Silicon-Via Technology for Continued Scaling in Memory System Performance and Capacity first appeared on SK hynix Newsroom.