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The world’s largest tech companies have descended on the Las Vegas Convention Center to showcase their latest innovations at Consumers Electronics Show (CES) 2024. Dubbed “the world’s most powerful tech event”, CES 2024 opened its doors on January 9 and is welcoming more than 4,000 exhibitors and thousands of visitors through January 12.

Figure 1. SK Wonderland features various amusement park-themed attractions

Alongside six other SK Group affiliates, SK hynix is inviting guests to SK Wonderland, an amusement park-themed showroom where visitors can experience a net-zero world free from climate change. Within SK Wonderland stands SK hynix’s booth, which features industry-leading AI solutions and an innovative AI fortune teller.

Fueling the Generative AI Revolution With Next-Generation Memory Solutions

Figure 2. The AI fortune teller sits at the center of SK hynix’s booth

As AI continues to advance and permeate various aspects of our daily lives, demand is increasing for high-performance memory which can handle the growing requirements of these AI systems. In response, SK hynix developed groundbreaking memory solutions including the world’s best performing HBM3E, the fifth generation of High Bandwidth Memory¹ (HBM).

Figure 3. SK hynix’s leading HBM3E solution presented at CES 2024

At CES 2024, visitors to SK hynix’s booth can discover the vast potential and applications of HBM3E. Offering the industry’s highest data processing speed of 1.18 terabytes (TB) per second, HBM3E satisfies the AI market’s need to rapidly process vast amounts of data. Compared to its predecessor HBM3, HBM3E is 1.3 times faster and provides 1.4 times more data capacity. The product also offers a 10% improvement in heat dissipation by adopting cutting-edge Advanced MR-MUF² technology. SK hynix is set to mass produce HBM3E in the first half of 2024, allowing customers to soon realize the full potential of their AI systems.

¹High Bandwidth Memory (HBM): A high-value, high-performance product that possesses much higher data processing speeds compared to existing DRAMs by vertically connecting multiple DRAMs with through-silicon via (TSV).
²Advanced Mass Reflow-Molded Underfill (MR-MUF): MR-MUF is a process in which semiconductor chips are stacked and a liquid protective material is injected into the space between the chips and then hardened to protect the chips and the surrounding circuitry. Advanced MR-MUF offers advantages in terms of controlling the thickness of wafers, evenly splicing chip bumps, and filling spaces between chips.

Figure 4. SK hynix’s groundbreaking AI memory technology on display

Alongside HBM3E, SK hynix also presented its Compute Express Link³ (CXL) interface, a test Computational Memory Solution⁴ (CMS) product, and its Accelerator-in-Memory based Accelerator⁵ (AiMX). In particular, CXL has been in the spotlight for its ability to enable memory expansion and improve the performance of AI applications, and is set to play a key role alongside HBM3E in the age of AI.

³Compute Express Link (CXL): A PCIe-based next-generation interconnect protocol on which high-performance computing systems are based.
⁴Computational Memory Solution (CMS): A product that integrates computational functions into CXL memory.
⁵Accelerator-in-Memory based Accelerator (AiMX): SK hynix’s accelerator card product that specializes in large language models using GDDR6-AiM chips.

Dealing the AI Tarot Cards of Destiny

Figure 5. Visitors find out their fortunes for 2024 at the AI fortune teller exhibit

The centerpiece of SK hynix’s booth is the AI fortune teller. Inspired by the animatronic fortune telling machines found in U.S. amusement parks, SK hynix’s fortune teller brought the concept into the AI era. The AI fortune teller scans a visitor’s face before printing out a cartomancy tarot card featuring their animated image. The interactive exhibition allows visitors to discover their new year’s fortunes and experience first-hand the potential of AI.

Sharing the Future of AI

Figure 6. SK hynix’s President and CEO Kwak Noh-Jung gives a presentation at the company’s CES 2024 press conference

In addition to showcasing its groundbreaking AI memory products, SK hynix also shared its thoughts on the future of AI. At a press conference held a day before CES 2024 kicked off, SK hynix’s President and CEO Kwak Noh-Jung gave a presentation on the company’s vision for the upcoming memory-centric AGI⁶ era.

Kwak opened by underlining how the performance and advancement of AI systems is largely reliant on the memory which supports them. As AI technology accelerates the transition to a data-centric age, memory solutions need to offer higher capacity, faster processing, and lower power consumption. SK hynix is responding to this move toward a memory-centric market by continuing to develop world-best products which will cement its industry leadership. These solutions include the upcoming HBM4 and HBM4E which will offer increased bandwidth, as well as LPCAMM⁷, CXL, and PIM⁸ and CIM⁹ products.

⁶Artificial General Intelligence (AGI): A theoretical form of AI research that aims to create software with human-like intelligence and the ability to self-teach.
⁷Low Power Compression Attached Memory Module (LPCAMM): A compact memory module standard used in laptops, PCs, and data centers which offers improvements in performance and power efficiency.
⁸Processing-In-Memory (PIM): A next-generation technology that adds computational capabilities to semiconductor memories to solve the problem of data movement congestion in AI and big data processing.
⁹Computing-in-Memory (CIM): A memory management solution that aims to improve speed and efficiency by performing computations directly in the memory.

Rounding off his presentation, Kwak announced that the company is developing a new custom memory platform which will harness its AI memory technology and research capabilities to create optimized solutions tailored for each customer’s strengths.

A Trailblazer During the Rise of AI

At CES 2024, SK hynix has cemented its position as the world’s leading AI memory provider. SK hynix’s booth gives visitors a glimpse into the significant possibilities of its industry-leading solutions, and the company will continue to demonstrate how its products can build a brighter future for all over the coming year.

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The post Pioneering Excellence in 2023 first appeared on SK hynix Newsroom.

Figure 1. SK hynix’s booth at Intel Innovation 2023

SK hynix announced on September 22 that it showcased its latest memory technologies and products at Intel Innovation 2023 held September 19–20 in the western U.S. city of San Jose, California.

Hosted by Intel since 2019, Intel Innovation is an annual IT exhibition which brings together the technology company’s customers and partners to share the latest developments in the industry. At this year’s event held at the San Jose McEnery Convention Center, SK hynix showcased its advanced semiconductor memory products which are essential in the generative AI era under the slogan “Pioneer Tomorrow With the Best.”

Figure 2. SK hynix’s cutting-edge CXL, HBM3, and DDR5 RDIMM products were on display

Products that garnered the most interest were HBM3¹, which supports the high-speed performance of AI accelerators, and DDR5 RDIMM, a DRAM module for servers with 1bnm process technology. As one of SK hynix’s core technologies, HBM3 has established the company as a trailblazer in AI memory. SK hynix plans to further strengthen its position in the market by mass-producing HBM3E (Extended) from 2024.

¹High Bandwidth Memory (HBM): A high-value, high-performance product that revolutionizes data processing speeds over conventional DRAMs by vertically connecting multiple DRAMs with through-silicon via (TSV) technology.

Meanwhile, DDR5 RDIMM with 1bnm, or the 5th generation of the 10nm process technology, also offers outstanding performance. In addition to supporting unprecedented transfer speeds of more than 6,400 megabits per second (Mbps), this low-power product helps customers simultaneously reduce costs and improve ESG performance.

Visitors to the SK hynix booth could also see its DDR5-based 96 gigabyte (GB) CXL² memory module products. The exhibit introduced the application cases of CXL such as with AI acceleration systems, and highlighted the benefits of the technology in terms of performance, reliability, security, and maintenance. Other products on display included LPDDR5X (Low Power Double Data Rate 5 eXtended) for mobile devices and DDR5 modules for servers and PCs.

²Compute Express Link (CXL): A next-generation interconnect protocol based on PCIe for efficiently building high-performance computing systems. It enables utilization of next-generation memory solutions that can be used in conjunction with existing DRAM products to increase the memory bandwidth of server systems and improve performance while easily expanding memory capacity.

Figure 3. Jinpyung Kim of DRAM Product Planning at SK hynix (left, first image) and Brian Yoon of DRAM Technology Planning at SK hynix America (right, first image) held a session on DDR5 and CXL technologies

Additionally, company employees held a session on how DDR5 and CXL memory can realize data-driven innovation. During the session, Jinpyung Kim of the DRAM Product Planning department at SK hynix and Brian Yoon from the DRAM Technology Planning department at SK hynix America discussed how DDR5 and CXL technologies are set to play a key role in the era of AI and big data.

“We will continue to showcase our advanced technologies to strengthen partnerships with our customers and further solidify our position as a global technology company that leads the way in various markets,” said Sungsoo Ryu, head of DRAM Product Planning at SK hynix.

The post SK hynix Presents Advanced Memory Technologies at Intel Innovation 2023 first appeared on SK hynix Newsroom.

SK hynix presented its next-generation memory technologies and products at HPE Discover 2023, an IT conference held this year in Las Vegas between June 20-22.

Figure 1. SK hynix’s exhibition booth at HPE Discover 2023

Held annually by the American ICT company Hewlett Packard Enterprise (HPE), HPE Discover brings together the company’s customers and partners along with industry experts to explore data center trends and the latest technologies such as memory solutions. SK hynix was among the exhibitors at the show as the company further strengthened its partnership with HPE.

Under the slogan “Elevate Your Edge With Memory Performance,” SK hynix showcased its industry-leading memory solutions for data centers. These included its PS1010 E3.S, a high-performance PCIe¹ Gen5-based eSSD, and DDR5 RDIMM, a DRAM module for servers applied with a 1bnm process. The capabilities of both products were highlighted during a joint promotion with HPE in which they were applied to Gen11, the host company’s latest server range.

¹Peripheral Component Interconnect Express (PCle): A serial-structured, high-speed I/O interface used on the motherboard of digital devices.

Figure 2. SK hynix and Solidigm display their advanced storage and memory solutions at HPE Discover 2023

Visitors could also see SK hynix’s lineup of advanced memory solutions including: HBM3² , a memory product that has been highlighted recently due to the rise of generative AI; CXL³ memory, an interconnect technology that enables efficient scaling of memory bandwidth and capacity; and PIM⁴ , a next-generation memory chip with computing capabilities. SK hynix’s subsidiary company, Solidigm, also showcased its portfolio of products including its PCIe Gen4 NVMe⁵ -based SSD.

²High Bandwidth Memory (HBM): A high-value, high-performance product that possesses much higher data processing speeds compared to existing DRAMs by vertically connecting multiple DRAMs with through-silicon via (TSV).
³Compute Express Link (CXL): A next-generation interconnect protocol based on PCIe that efficiently bolsters high-performance computing systems.
⁴Processing-In-Memory (PIM): A next-generation technology that adds computational capabilities to semiconductor memories to solve congestions in data movement found in AI and big data processing.
⁵Non-Volatile Memory express (NVMe): A communication protocol for storage devices based on PCIe interface. It can achieve speeds of up to six times greater than traditional SATA interfaces, making it suitable for ultra-fast, large data processing.

Figure 3. Vice President Eui-cheol Lim of SK hynix’s Solution Development division explains how PIM semiconductors will increase the efficiency of GPTs in the future

SK hynix also held a session where its members spoke about the role and vision of memory solutions in the future. For his part of the presentation, Vice President Eui-cheol Lim of the Solution Development division gave a talk on how PIM semiconductors can increase the efficiency of Generative Pre-trained Transformers (GPTs). Technical Leaders Tai-jin Choi and Santosh Kumar of SK hynix America presented about trends in SSD storage technology for next-generation servers, and their colleague Technical Leader Yoosung Lee presented on how DDR5 is set to be the standard for next-generation DRAMs in the era of big data. All three presentations emphasized how memory solutions are essential in responding to the rapidly changing IT environment.

“Going forward, we plan to not only strengthen our partnerships with key customers but also showcase our unprecedented, next-generation memory solutions,” said Seok Kim, the head of GSM Strategy at SK hynix.

The post SK hynix Showcases Data Center Memory Solutions at HPE Discover 2023 first appeared on SK hynix Newsroom.

SK hynix participated in Dell Technologies World (DTW) 2023 in Las Vegas, USA for four days between May 22-25 to showcase its latest memory technologies and products.

SK hynix’s booth at DTW 2023

DTW is the largest annual event hosted by Dell Technologies that brings together various global IT companies to unveil their latest developments that will drive future technology trends. This year’s slogan from SK hynix “Don’t bet on luck, bet on our Tech!” evokes the spirit of the host city Las Vegas and emphasizes the message that the company will continue creating and exploring diverse technologies for the new era of big data.

SK hynix, which has participated in the event since 2019, presented a variety of its latest technologies and products. First, the company unveiled PS1010, a PCIe¹ Gen5-based eSSD that will be applied to Dell Technologies’ server products. The company also demonstrated the performance of its new cSSD, PC801, in a Dell desktop to showcase the company’s evolving technology.

¹ Peripheral Component Interconnect Express (PCIe): A serial-structured, high-speed I/O interface used in the mainboard of digital devices.

SK hynix showcasing its CXL memory and HBM3

In addition, SK hynix displayed its CXL² memory through a demonstration on a real server and held a joint exhibition of its HBM3³ and NVIDIA’s H100 GPU. Used for AI chatbots, NVIDIA’s H100 GPU has adopted HBM3 to realize next-generation performance levels.

² Compute Express Link (CXL): A PCIe-based, next-generation interconnect protocol to effectively establish high-performance computing systems.

³ High Bandwidth Memory (HBM): A high-value, high-performance memory solution that vertically interconnects multiple DRAM chips with TSV to dramatically increase the data processing speed in comparison to traditional DRAM products. HBM3 is the fourth-generation product, succeeding the previous generations HBM, HBM2 and HBM2E.

Throughout the event, SK hynix provided visitors with a look at its diverse portfolio of solutions including several DRAM product lines such as its DDR5 modules for servers and PCs, LPDDR5X for mobile devices, and GDDR6 graphics memory. Other products included eSSDs with various form factors like E1.S, U.2, M.2 22110, and M.2 2280. New cSSDs such as PC801 and BC901 were on display as well, while Consumer SSDs such as P31 and P41 were also featured in the booth. Additionally, SK hynix presented PCIe Gen4 NVMe⁴-based enterprise and cSSDs from its subsidiary company, Solidigm.

⁴ Non-Volatile Memory Express (NVMe): As a communication protocol for storage devices based on the PCIe interface, NVMe can achieve speeds of up to six times or more compared to the existing SATA interface—making it suitable for ultra-high speed, large data processing tasks.

Eung-bo Shim, a technical leader in charge of next-generation memory development, presenting the concept and strengths of CXL memory

SK hynix went on to hold a breakout session that introduced the role and future of its CXL memory technology. “CXL memory is a solution that increases the bandwidth compared to existing DRAM products to improve performance. This technology enables the capacity to be expanded more easily than ever before and will soon become commercially available,” said Eung-bo Shim,  a technical leader responsible for next-generation memory development at SK hynix. “As a product that has strengths in reliability, security and maintenance, it will be used in various servers in the future.”

By attending global events like DTW down the road, SK hynix plans to continue strengthening its partnerships with key customers and introducing its new products on the world stage.

The post SK hynix Showcases Its Next-Generation Technologies at Dell Technologies World 2023 first appeared on SK hynix Newsroom.

The post How SK hynix is Set to Power the Generative AI Revolution first appeared on SK hynix Newsroom.

The recent boom in demand for artificial intelligence (AI) services such as big data and ChatGPT has intensified competition for the next-generation semiconductor products that support such technologies. SK hynix is pushing technological limits to lead the development of these high-performance products, such as its High Bandwidth Memory (HBM)¹ solutions.

¹High Bandwidth Memory (HBM): A high-value and high-performance product that revolutionizes data processing speed by vertically connecting multiple DRAM chips using Through Silicon Via (TSV). HBM3 is the fourth and latest generation of the series.

After developing the world’s first HBM3 in 2021 and successfully mass producing it the following year, SK hynix announced in April 2023 that it had developed the world’s first 12-layer HBM3 and provided samples to customers including AMD. The latest product offers an industry-leading 24 GB memory capacity in the same size package as its predecessor, highlighting the company’s technical leadership in the field.

To find out more about the 12-layer HBM3, the SK hynix Newsroom met with members of the team behind the product. The team explained about the product’s features, the application of cutting-edge technologies including advanced MR-MUF², the story behind its development, and their ambitions for the next generation of solutions.

²Mass Reflow-Molded Underfill (MR-MUF): A process in which semiconductor chips are stacked and a liquid protective material is injected into the space between the chips and then hardened to protect the chips and the surrounding circuitry. Compared to applying a film-type material after each chip is stacked, MR-MUF is a more efficient process and offers effective heat dissipation.

▲ The 12-layer HBM3 offers the largest industry memory capacity of 24 GB

Achieving the Highest Capacity HBM3 With Advanced MR-MUF

The 12-layer HBM3 offers 50% more memory capacity than its 16 GB predecessor by increasing the number of DRAM chips from 8 to 12. This enabled SK hynix to achieve the largest industry memory capacity of 24 GB while also maintaining the same height, or thickness, as the 16 GB product. In other words, SK hynix was able to develop a solution that can process more data in the same space as before. So how did the company achieve such a feat?

▲ An overview of the technologies used to develop the 12-layer HBM3

In order to increase the product’s capacity, or number of layers, while maintaining its thickness, the stacked DRAM chips had to be 40% thinner than before. However, this can cause problems such as the chips bending easily. The team overcame these technical issues by applying an improved epoxy molding compound (EMC)³ and utilizing advanced MR-MUF technology with a new stacking method.

³Epoxy molding compound (EMC): A heat dissipation material based on epoxy resin, a type of thermosetting polymer, that seals semiconductor chips to protect them from environmental factors such as heat, moisture, and shock.

SK hynix is currently providing samples of the new solution to a number of its global customers for performance testing and has received an overwhelmingly positive response.

“AI models continue to grow and drive demand for large memory capacity. We welcome the efforts by SK hynix to increase HBM memory capacity to support cutting-edge AI models,” said Roman Kyrychynskyi, corporate vice president (CVP) of Product Management at AMD.

“With the 12-layer HBM3, System-on-Chip (SoC)⁴ companies can achieve a 1.5-times memory capacity increase with the same size product without the need for additional space in the system,” said PL Wang-su Kim, who is in charge of DRAM product planning at SK hynix. “Many customers have shown high confidence in our technology. We will start supplying the new product in the second half of 2023.”

⁴System-on-Chip (SoC): A product that integrates multimedia components (graphics, audio, and video), semiconductors (CPU and DRAM), and all hardware components necessary for a computer to process instructions into one chip.

Securing Excellent Heat Dissipation, Productivity, and Reliability

▲ Wang-su Kim explains the development of the 12-layer HBM3

“SK hynix anticipated customer and market needs and had already put a 24 GB product on the development roadmap in 2022,” said Kim. “This allowed us to move quickly to develop the technology and introduce the 12-layer HBM3 24 GB package.”

Kim added that the 12-layer HBM3 was developed in about ten months following the mass production of the previous 8-layer version. During this remarkably rapid product development process, the team inevitably encountered some challenges. In particular, stacking 12 DRAM chips, which are 40% thinner, with a 13% narrower gap than before made it difficult to maintain control of the chips and apply the original packaging process. PL Jong-oh Kwon, in charge of wafer-level package (WLP) back-end (BE) development, revealed that the solution was to introduce the advanced MR-MUF process.

▲ Jong-oh Kwon (standing) explains the advanced MR-MUF technology

“The advanced MR-MUF process offers three improvements over the original MR-MUF,” said Kwon. “First, we incorporated new technology to control the thinning of the wafers so they don’t bend. Next, during the 12-layer stacking process, we momentarily applied intense heat to ensure that the bumps connecting the chips were evenly spliced. Finally, we placed a new heat-dissipating EMC material under a vacuum and applied 70 tons of pressure to fill the tight spaces between the chips.”

Kwon emphasized that advanced MR-MUF retains the advantages of the original MR-MUF, while increasing productivity approximately three-fold and boosting heat dissipation by around 2.5 times.

Cross-Organizational Collaboration and Testing Key to Success

PL Kim credited cross-organizational collaboration as a major factor in the product’s success. He highlighted how this “one-team” mindset enabled harmonized product development. This is shown by the combination of the device technology that prevents defects during the stacking process, the design technology that ensures uniform cell speed in higher layers, and the package technology that supports effective heat dissipation.

▲ Jin-woo Park (left) and Ju-heon Yang (right) talk about the development process of the 12-layer HBM3

A sharp focus on testing to ensure quality and reliability was also a key success factor. “There are hundreds of thousands of bumps between chips,” said PL Ju-heon Yang, who is responsible for WLP front-end (FE) development. “We tested them one by one to find the optimal bonding conditions and minimize defects.”

“With 1.5 times more chips stacked than before, it was difficult to secure yield and quality early on,” said PL Hyung-su Sung, who tests DRAM wafers and HBM3 on the HBM Product Engineering (PE) team. “After numerous attempts, we established an optimal test baseline for the 12-layer solution.”

As with other solutions, the 12-layer HBM3 can only be considered a finished product when it is packaged for the customer without defects. PL Kim and PL Jin-woo Park, who is in charge of HBM package products, are working hard to complete this process and are currently carrying out customer performance verification.

“We are actively communicating with our customers to solve any issues,” said Park. “We are building a win-win ‘HBM ecosystem’ so that we can have a mutual understanding with our customers, share information, and create the best products.”

Continuing to Lead the Way With HBM3E & HBM4

▲ Hyung-su Sung (left), Wang-su Kim (center), and Jong-oh Kwon (right) share their thoughts on the development of the 12-layer HBM3

Although there is still a long way to go, the team members are overjoyed with their achievements. “There is always a sense of trepidation to go down an unknown road, but it makes the joy of reaching your goal even greater,” said Sung. “We are proud to have developed the world’s first 12-layer HBM3.”

▲ Wang-su Kim analyzes the 12-layer HBM3

The team is committed to maintaining SK hynix’s leadership in the HBM field by continuing to advance HBM solutions in the future. With plans to develop the next-generation HBM3E and HBM4 products, the company will further enhance its reputation as a pioneer of HBM technology unmatched by its rivals.

The post Strengthening HBM Market Leadership: Meet the SK hynix Team Behind the World’s First 12-Layer HBM3 first appeared on SK hynix Newsroom.

A premium, high-performance technology which has revolutionized data processing speeds by vertically stacking multiple DRAMs using through-silicon via (TSV)¹—it is none other than High Bandwidth Memory (HBM). This groundbreaking memory solution utilizes an advanced packaging method to vertically interconnect the upper and lower chips through thousands of microscopic holes in the DRAMs. Through this process, the performance of the HBM product is increased while its size is reduced.

¹Through-silicon via (TSV): A type of vertical interconnect access (via) that completely passes through a silicon die or wafer to enable the stacking of silicon dice.

As a next-generation memory technology, HBM offers solutions to key problems faced in the memory sector. In the video above, a data bottleneck is demonstrated by the long line of people—representing data—standing at the platform of D (DRAM) Station. So, what causes data to be stuck at a standstill like this?

To provide some context to this issue, it is necessary to know that there are eight DQs², or paths for data input/output, per chip in a typical DRAM. When organized into units of DIMM³ modules, there are a total of 64 DQs. However, as system requirements for DRAMs and processing speed have increased, the amount of data being transferred has risen as well. Consequently, the number of DQs—the number of entrances and exits at D Station—was no longer sufficient for the smooth passage of data.

²DQ: A path for data transfer that acts as the data bus for the communication between the processor and memory. It has the characteristic of being bidirectional as it must be capable of both reading and writing.

³Dual in-line memory module (DIMM): A memory module that is mounted on a printed circuit board and contains multiple memory chips. It is usually used as a primary memory unit in a PC or server.

HBM is the solution for such data bottlenecks. It has a whopping 1,024 DQs and its form factor, which refers to the physical area, is more than 10 times smaller than a standard DRAM thanks to SIP⁴ and TSV technology. As a vast amount of space is required for conventional DRAMs to communicate with processors like CPUs and GPUs since they need to be connected through wire bonding⁵ or PCB traces⁶, it is impossible for DRAMs to conduct parallel processing for large amounts of data. In contrast, HBM products can communicate over very short distances which allows for the increase in DQ paths. These HBM technologies dramatically increase the movement of signals traveling between stacked DRAMs and enable data transfer at high speeds with low power consumption.

⁴System-in-package (SIP): A type of package in which multiple devices are made into a single package to implement a system.

⁵Wire bonding: A method for creating electrical interconnections between electrical device components.

⁶PCB trace: An electrical connection formed on a printed circuit board.

SK hynix, which developed the industry’s first HBM in 2013, began mass production of HBM3 in June 2022. As the fourth generation of HBM, HBM3 is approximately 78% faster than its predecessor, HBM2E. With such capabilities, HBM products can be deployed in high-performance data centers and applied to machine learning, supercomputers, artificial intelligence systems, and other advanced technologies.

SK hynix will continue to develop HBM products while ensuring that all its solutions adhere to ESG management standards to maintain its position as a leader in the premium memory market.

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