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SK hynix has returned to Las Vegas for Consumer Electronics Show (CES) 2025, showcasing its latest AI memory innovations reshaping the industry. Held from January 7–10, CES 2025 brings together the brightest minds and groundbreaking technologies from the world’s leading tech companies.

This year, the event’s theme is “Dive In,” inviting attendees to immerse themselves in the next wave of technological advancement. SK hynix is emphasizing how it is driving this wave through a display of leading AI memory technologies at the SK Group exhibit. Along with SK Telecom, SKC, and SK Enmove, the company is highlighting how the Group’s AI infrastructure brings about true change under the theme “Innovative AI, Sustainable Tomorrow.”

Groundbreaking Memory Tech Driving Change in the AI Era

SK hynix is underlining its AI memory leadership at CES 2025

Visitors enter SK Group’s exhibit through the Innovation Gate, greeted by a video of dynamic wave-inspired visuals which symbolize the power of AI. The video shows the transformation of binary data into a wave which flows through the exhibition, highlighting how data and AI drives change across industries.

Continuing deeper into the exhibit, attendees make their way into the AI Data Center area, the focal point of SK hynix’s display. This area features the company’s transformative memory products driving progress in the AI era. Among the cutting-edge AI memory technologies on display are SK hynix’s HBM¹, server DRAM, eSSD, CXL^®2, and PIM³ products.

¹High Bandwidth Memory (HBM): A high-performance memory that vertically stacks multiple DRAM chips with through-silicon via (TSV). HBM3E is the extended version of HBM3, the fourth generation following HBM, HBM2, and HBM2E.
²Compute Express Link^®(CXL^®): A next-generation interface that connects the CPU, GPU, memory, and other components to efficiently enhance the performance of high-performance computing systems.
³Processing-In-Memory (PIM): A next-generation technology that integrates computational capabilities into memory, addressing data movement bottlenecks in AI and big data processing.

The 48 GB 16-layer HBM3E takes center stage at the AI Data Center area

A sample of the company’s pioneering 16-layer HBM3E is prominently showcased at the event, highlighting SK hynix’s leadership in the HBM field. As the world’s largest capacity HBM, the 48 GB 16-layer HBM3E, which is currently under development, is optimized for AI learning and inference. Visitors can also check out DDR5 RDIMM and MCR DIMM, high-speed server DRAM modules tailored for data center environments which offer rapid data processing and large memory capacity.

SK hynix’s cutting-edge AI memory technologies on display

As data storage becomes ever more crucial in the AI landscape, SK hynix is also showcasing its eSSD (enterprise SSD) solutions, including PS1010, PEB110, and PE9010. Designed for data centers, these products offer the reliability and rapid read/write speeds needed to handle the immense data generated by AI applications. Additionally, SK hynix is presenting its groundbreaking CXL technologies, such as CMM-DDR5⁴ and CMM-Ax⁵, which are pushing the boundaries of memory interfaces for enhanced flexibility and scalability in AI systems. Also on display are PIM solutions including GDDR6-AiM and AiMX⁶, a high-speed, low-power accelerator card which performs computational functions, revolutionizing data processing efficiency in AI environments.

⁴CXL Memory Module-DDR5 (CMM-DDR5): A next-generation DDR5 memory module utilizing CXL technology to boost bandwidth and performance for AI, cloud, and high-performance computing.
⁵CXL Memory Module-Ax (CMM-Ax): A high-performance memory module optimized for computational workloads, improving AI and data center efficiency.
⁶Accelerator-in-Memory Based Accelerator (AiMX): SK hynix’s specialized accelerator card tailored for large language model processing using GDDR6-AiM chips.

Visitors can also check out the company’s innovative on-device AI solutions

SK hynix is also showcasing its on-device AI solutions⁷ to highlight the AI service applications of its products. These include LPCAMM2⁸, the mobile NAND solution ZUFS⁹ 4.0, and PCB01—the industry’s highest-performing SSD for on-device AI PCs. Through these displays, SK hynix is underlining how these technologies deliver top performance with power efficiency, empowering a range of applications from mobile AI to consumer electronics.

⁷On-device AI: A technology that enables real-time AI processing directly on devices, enhancing responsiveness and delivering personalized services without relying on cloud-based computation.
⁸Low Power Compression Attached Memory Module 2 (LPCAMM2): LPDDR5X-based module solution that offers power efficiency and high performance as well as space savings. It offers performance levels equivalent to two DDR5 SODIMMs, making it optimized for on-device AI.
⁹Zoned Universal Flash Storage (ZUFS): An advanced version of UFS that improves data management efficiency by organizing data into zones, optimizing transfer between the operating system and storage device.

A Pioneer for a Sustainable Future

As CES 2025 unfolds, SK hynix’s presence once again cements its position as a leader in AI memory solutions. Through its innovative products and visionary approach, the company is demonstrating the essential role memory plays in the growing AI ecosystem. At CES 2025, SK hynix is not just showcasing products, but also offering a glimpse into a future where AI drives sustainable progress across industries. Looking ahead, CEO Kwak Noh-Jung shared the company’s vision. “Driven by constant technological innovation and a robust product lineup tailored for the AI era, SK hynix is on track to becoming a full stack AI solution provider,” he said.

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• SK hynix to showcase technological capabilities, participating in the world’s largest consumer electronics show, CES 2025, from January 7-10
• Featuring a wide range of products driving the AI era, from HBM, the core of AI infrastructure, to next-gen memories like PIM
• Company to present new possibilities in the AI era through technological innovation and provide irreplaceable value

Seoul, January 3, 2025

SK hynix Inc. (or “the company”, www.skhynix.com) announced today that it will showcase its innovative AI memory technologies at CES 2025, to be held in Las Vegas from January 7 to 10 (local time).

A large number of C-level executives, including CEO Kwak Noh-Jung, CMO (Chief Marketing Officer) Justin Kim and Chief Development Officer (CDO) Ahn Hyun, will attend the event. “We will broadly introduce solutions optimized for on-device AI and next-generation AI memories, as well as representative AI memory products such as HBM and eSSD at this CES,” said Justin Kim. “Through this, we will publicize our technological competitiveness to prepare for the future as a ‘Full Stack AI Memory Provider¹’.”

¹Full Stack AI Memory Provider: Refers to an all-round AI memory provider, which provides comprehensive AI-related memory products and technologies

SK hynix will also run a joint exhibition booth with SK Telecom, SKC and SK Enmove, under the theme “Innovative AI, Sustainable Tomorrow.” The booth will showcase how SK Group’s AI infrastructure and services are transforming the world, represented in waves of light.

SK hynix, which is the world’s first to produce 12-layer HBM products for 5th generation and supply them to customers, will showcase samples of HBM3E 16-layer products, which were officially developed in November last year. This product uses the advanced MR-MUF process to achieve the industry’s highest 16-layer configuration while controlling chip warpage and maximizing heat dissipation performance.

In addition, the company will display high-capacity, high-performance enterprise SSD products, including the ‘D5-P5336’ 122TB model developed by its subsidiary Solidigm in November last year. This product, with the largest existing capacity, high power and space efficiency, has been attracting considerable interest from AI data center customers.

“As SK hynix succeeded in developing QLC²(Quadruple Level Cell)-based 61TB products in December, we expect to maximize synergy based on a balanced portfolio between the two companies in the high-capacity eSSD market” said Ahn Hyun, CDO at SK hynix. The company will also showcase on-device AI products such as ‘LPCAMM2³’ and ‘ZUFS 4.0⁴,’ which improve data processing speed and power efficiency to implement AI in edge devices like PCs and smartphones. The company will also present CXL and PIM (Processing in Memory) technologies, along with modularized versions, CMM(CXL Memory Module)-Ax and AiMX⁵, designed to be core infrastructures for next-generation data centers.

²QLC: NAND flash is divided into SLC (Single Level Cell), MLC (Multi Level Cell), TLC (Triple Level Cell), QLC (Quadruple Level Cell), and PLC (Penta Level Cell) depending on how much information is stored in one cell. As the amount of information stored increases, more data can be stored in the same area.
³Low Power Compression Attached Memory Module 2 (LPCAMM2): LPDDR5X-based module solution that provides power efficiency and high performance as well as space savings. It has the performance effect of replacing two existing DDR5 SODIMMs with one LPCAMM2.
⁴Zoned Universal Flash Storage (ZUFS): A NAND Flash product that improves efficiency of data management. The product optimizes data transfer between an operating system and storage devices by storing data with similar characteristics in the same zone of the UFS, a flash memory product for various electronic devices such as digital camera and mobile phone.
⁵Accelerator-in-Memory based Accelerator (AiMX): SK hynix’s accelerator card product that specializes in large language models using GDDR6-AiM chips

In particular, CMM-Ax is a groundbreaking product that adds computational functionality to CXL’s advantage of expanding high-capacity memory, contributing to improving performance and energy efficiency of the next-generation server platforms⁶.

⁶Platform: Refers to a computing system that integrates both hardware and software technologies. It includes all key components necessary for computing, such as the CPU and memory.

“The changes in the world triggered by AI are expected to accelerate further this year, and SK hynix will produce 6^th generation HBM (HBM4) in the second half of this year to lead the customized HBM market to meet the diverse needs of customers,” said Kwak Noh-Jung, CEO at SK hynix. “We will continue to do our best to present new possibilities in the AI era through technological innovation and provide irreplaceable value to our customers.”

About SK hynix Inc.

SK hynix Inc., headquartered in Korea, is the world’s top-tier semiconductor supplier offering Dynamic Random Access Memory chips (“DRAM”), flash memory chips (“NAND flash”), and CMOS Image Sensors (“CIS”) for a wide range of distinguished customers globally. The Company’s shares are traded on the Korea Exchange, and the Global Depository shares are listed on the Luxemburg Stock Exchange. Further information about SK hynix is available at www.skhynix.com, news.skhynix.com.

Media Contact

SK hynix Inc.
Global Public Relations

Technical Leader
Sooyeon Lee
E-Mail: global_newsroom@skhynix.com

Technical Leader
Kanga Kong
E-Mail: global_newsroom@skhynix.com

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SK hynix’s booth at SC24

Returning for its second year, SK hynix is underlining its AI memory leadership through a display of innovative memory products and insightful presentations on AI and HPC technologies. In line with the conference’s “HPC Creates” theme which underscores the impact of supercomputing across various industries, the company is showing how its memory solutions drive progress in diverse fields.

Showcasing Advanced Memory Solutions for AI & HPC

At the booth, SK hynix is demonstrating and displaying a range of groundbreaking products tailored for AI and HPC. The products being demonstrated include its CMM (CXL^®1 Memory Module)-DDR5²,  AiMX³ accelerator card, and Niagara 2.0 among others.

¹Compute Express Link^® (CXL^®): A PCIe-based next-generation interconnect protocol on which high-performance computing systems are based.
²CXL Memory Module-DDR5 (CMM-DDR5): A next-generation DDR5 memory module utilizing CXL technology to boost bandwidth and performance for AI, cloud, and high-performance computing.
³Accelerator-in-Memory Based Accelerator (AiMX): SK hynix’s specialized accelerator card tailored for large language model processing using GDDR6-AiM chips.

Live demonstrations of CMM-DDR5 and AiMX at the booth

The live demonstration of CMM-DDR5 with a server platform featuring Intel^® Xeon^® 6 processors shows how CXL^® memory technology accelerates AI workloads under various usage models. Moreover, visitors to the booth can learn about the latest CMM-DDR5 product with EDSFF⁴ which offers improvements in TCO⁵ and performance. Another live demonstration features AiMX integrated in an ASRock Rack Server to run Meta’s Llama 3 70B, a large language model (LLM) with 70 billion parameters. This demonstration highlights AiMX’s efficiency in processing large datasets while achieving high performance and low power consumption, addressing the computational load challenges posed by attention layers⁶ in LLMs.

⁴Enterprise and Data Center Standard Form Factor (EDSFF): A collection of SSD form factors specifically used for data center servers.
⁵Total cost of ownership (TCO): The complete cost of acquiring, operating, and maintaining an asset, including purchase, energy, and maintenance expenses.
⁶Attention layer: A mechanism that enables a model to assess the relevance of input data, prioritizing more important information for processing.

SK hynix’s Niagara 2.0, customized HBM, OCS, and SSD products

Among the other technologies being demonstrated is Niagara 2.0. The CXL pooled memory solution enables data sharing to minimize GPU memory shortages during AI inference⁷, making it ideal for LLM models. The company is also demonstrating an HBM with near-memory processing (NMP)⁸ which accelerates indirect memory access⁹, a frequent occurrence in HPC. Developed with Los Alamos National Laboratory (LANL), the solution highlights the potential of NMP-enabled HBM to advance next-generation technologies.

Another demonstration is showcasing SK hynix’s updated OCS¹⁰ solution, which offers significant improvements in analytical performance for real-world HPC workloads compared to the iteration displayed at SC23. Co-developed with LANL, OCS addresses performance issues in traditional HPC systems by enabling storage to independently analyze data, reducing unnecessary data movement and improving resource efficiency. Additionally, the company is demonstrating a checkpoint offloading SSD¹¹ prototype that improves LLM training resource utilization by enhancing performance and scalability.

⁷AI inference: The process of using a trained AI model to analyze live data for predictions or task completions.
⁸Near-memory processing (NMP): A technique that performs computations near data storage, reducing latency and boosting performance in high-bandwidth tasks like AI and HPC.
⁹Indirect memory access: A computing addressing method in which an instruction providing the address of a memory location that contains the actual address of the desired data or instruction.
¹⁰Object-based computational storage (OCS): A storage architecture that integrates computation within the storage system, enabling local data processing and minimizing movement to enhance analytical efficiency.
¹¹Checkpoint offloading SSD: A storage solution that stores intermediate data during AI training, improving efficiency and reducing training time.

SK hynix presented various data center solutions, including HBM3E, DDR5, and eSSD products

In addition to running product demonstrations, SK hynix is also displaying a robust lineup of data center solutions, including its industry-leading HBM3E¹². The fifth-generation HBM provides high-speed data processing, optimal heat dissipation, and high capacity, making it essential for AI applications. Alongside HBM3E are the company’s rapid DDR5 RDIMM and MCR DIMM products, which are tailored for AI computing in high-performance servers. Enterprise SSDs (eSSDs) including the Gen 5 PS1010 and PEB110 are also on display. Offering ultra-fast read/write speeds, these SSD solutions are vital for accelerating AI training and inference in large-scale environments.

¹²HBM3E: The fifth-generation High Bandwidth Memory (HBM), a high-value, high-performance product that revolutionizes data processing speeds by connecting multiple DRAM chips with through-silicon via (TSV).

Highlighting the Potential of Memory Through Expert Presentations

During the conference, Jongryool Kim, research director of AI System Infra, presented on “Memory & Storage: The Power of HPC/AI,” highlighting the memory needs for HPC and AI systems. He focused on two key advancements including near-data processing technology using CXL, HBM, and SSDs to improve performance, and CXL pooled memory for better data sharing across systems.

(From first image) Research Director Jongryool Kim presenting on advancements in memory and storage for HPC and AI systems; Technical Leader Jeoungahn Park delivering a presentation on OCS

Technical Leader Jeoungahn Park of the Sustainable Computing team also took to the stage for his talk on “Leveraging Open Standardized OCS to Boost HPC Data Analytics.” Park explained how OCS enables storage to automatically recognize and analyze data, thereby accelerating data analysis in HPC. He added how OCS enhances resource efficiency and integrates seamlessly with existing analytics systems, as well as how its analysis performance has been verified in real-world HPC applications.

At SC24, SK hynix is solidifying its status as a pioneer in memory solutions which are driving innovations in AI and HPC technologies. Looking ahead, the company will continue to push technological boundaries with support from its partners to shape the future of AI and HPC.

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SK hynix participated in the SK AI Summit 2024 held at COEX in Seoul, South Korea from November 4–5. The company officially announced it is developing the world’s largest capacity HBM¹, the 48 GB 16-layer HBM3E, at the event and shared other key achievements along with its vision to become a full stack AI memory provider.

Held under the slogan “AI Together, AI Tomorrow,” the event was formerly SK Group’s annual SK Tech Summit but has evolved with a greater focus on AI into the SK AI Summit. Global AI leaders gathered to explore strategies on thriving in the AGI² era and discuss ways to strengthen the AI ecosystem.

Prominent business figures in attendance included SK Group Chairman Chey Tae-won, SK hynix CEO Kwak Noh-Jung, SK Telecom President and CEO Ryu Young-sang, OpenAI Chairman and President Greg Brockman, and Microsoft Corporate Vice President for Azure Hardware Systems and Infrastructure Rani Borkar. Major tech companies such as Amazon Web Services (AWS) and Microsoft, as well as members of the K-AI Alliance³, also participated in the event, operating booths and interacting with industry stakeholders and visitors.

¹High Bandwidth Memory (HBM): A high-value, high-performance memory that vertically interconnects multiple DRAM chips using through-silicon via (TSV) and dramatically increases data processing speed in comparison to traditional DRAM products. HBM3E is the extended version of HBM3, the fourth-generation product that succeeds HBM, HBM2 and HBM2E.
²Artificial General Intelligence (AGI): A theoretical form of AI research that aims to create software with human-like intelligence and the ability to self-teach.
³K-AI Alliance: Established by SK Telecom, the K-AI Alliance consists of Korean tech companies which aim to lead the development and global expansion of the Korean AI industry.

As a key player in the AI industry, SK hynix showcased its leading AI memory products and achievements, with particular attention drawn to the announcement of the 16-layer HBM3E. Several SK hynix executives attended the product presentation which underlined the company’s technological leadership, including: CEO Kwak; Vice President Uksong Kang, head of Next Generation Product Planning; Vice President Munphil Park, head of HBM Product Engineering (PE); Kangwook Lee, head of Package Development; Youngpyo Joo, head of Software Solution; and SK hynix America’s Vice President of Technology Paul Fahey.

SK Group Chairman Chey Tae-won delivers opening remarks at the SK AI Summit

SK Group Chairman Chey opened the summit by presenting the group’s vision for AI in line with the summit’s slogan. “AI is in its early stages and there are many unknowns, so the participation and cooperation of numerous stakeholders is crucial to solve problems and make progress,” said Chey. “SK is a global company involved in everything from chips to energy, data center construction and operation, service development, and technology commercialization. We are working with the best partners in each field to foster global AI innovation.”

SK hynix’s Keynote Address: CEO Kwak Announces 16-Layer HBM3E

On the first day, CEO Kwak delivered a keynote address titled “Next AI Memory: Hardware to Everywhere” in which he officially announced the 16-layer HBM3E is under development.

SK hynix CEO Kwak Noh-Jung delivers a keynote speech at the summit

“We stacked 16 DRAM chips to realize 48 GB capacity and applied Advanced MR-MUF technology⁴ proven for mass production. In addition, we are developing hybrid bonding⁵ technology as a backup process,” explained Kwak. “The 16-layer HBM3E can improve AI learning performance and inference⁶ performance by up to 18% and 32%, respectively, compared to the 12-layer HBM3E.” The 16-layer HBM3E is planned to be commercialized in 2025.

⁴Advanced mass reflow-molded underfill (MR-MUF): Next-generation MR-MUF technology with warpage control, which enables warp-free stacking of chips 40% thinner than conventional chip thicknesses, and improved heat dissipation properties due to new protective materials.
⁵Hybrid bonding: A technology that directly bonds chips without forming a bump between them during stacking. This reduces the overall thickness of the chip, enabling high stacking. SK hynix is looking at both Advanced MR-MUF and hybrid bonding methods for 16-layer and higher HBM products.
⁶AI inference: The process of running live data through a trained AI model to make a prediction or solve a task.

At the announcement, Kwak also revealed the company’s roadmap featuring three areas: World First (world-first developed and mass-produced products), Beyond Best (next-generation, high-performance products), and Optimal Innovation (system-optimized products for the AI era). “Following the development of the 16-layer HBM3E and the 1cnm DDR5 RDIMM, we plan to develop next-generation, high-performance products such as HBM4 and UFS⁷ 5.0,” he said. “In the long term, we will commercialize custom HBM and CXL^®8 optimized for AI to become a full stack AI memory provider.”

⁷Universal Flash Storage (UFS): A mobile storage standard that allows simultaneous read and write functions, unlike the existing embedded MultiMediaCard (eMMC). Developed up to version 4.0, it combines the high speed of PC storage (SSD) with the low power of mobile storage (eMMC).
⁸Compute Express Link^® (CXL^®): A next-generation interface for efficiently utilizing high-performance computing systems.

Kwak also gave more information about HBM4. “We are working with the world’s leading foundry to improve the performance of the base die and ultimately reduce power consumption,” said Kwak. “With our ‘one-team’ partnership, we will deliver the most competitive products and further solidify our position as the HBM leader.”

Presentations: Key Executives Deliver Insights on HBM & Next-Gen Memory

During the talk sessions, SK hynix executives were key presenters in the AI chip and service areas, providing insights from their respective fields.

(From the first image) Professor Sungjoo Yoo of Seoul National University; Munphil Park of HBM PE; Professor Gunjae Koo of Korea University; and Youngpyo Joo, head of Software Solution, deliver presentations

Munphil Park of HBM PE and Professor Sungjoo Yoo of Seoul National University’s Department of Computer Science and Engineering presented on accelerator trends and the outlook for HBM. In response to Professor Yoo’s prediction of rising AI inference cost, Park emphasized that custom HBM products are emerging for improved performance and cost optimization. In addition, Park noted that three-way collaboration between customers, foundries, and memory providers is addressing this advancement.

Youngpyo Joo, head of Software Solution, and Professor Gunjae Koo of Korea University’s Department of Computer Science and Engineering discussed future architectures and new memory solutions. Professor Koo expressed the need for a new system software structure, and Joo explained how SK hynix meets this demand through its new CXL and PIM⁹ memory solutions.

⁹Processing-In-Memory (PIM): A next-generation technology that adds computational capabilities to memory to solve the problem of data movement congestion in AI and big data processing.

(From the first image) Vice President Uksong Kang, head of Next Generation Product Planning, and Paul Fahey, SK hynix America’s Vice President of Technology, participating in a fireside chat

SK hynix Vice Presidents Uksong Kang and Paul Fahey participated in a fireside chat on “Digital Neural Networks in the Era of Hyperconnectivity: AI and Memory Shaping the Future of the Industrial Landscape”. The pair spoke about how three technologies will play a significant role in the future: next-generation HBM with logic processes applied to base die; PIM, which will be crucial for on-device AI¹⁰; and CXL, which has memory sharing capabilities. They also revealed that SK hynix is working closely with partners to create next-generation AI memory products.

¹⁰On-device AI: A technology that enables AI processing directly on the device, improving responsiveness and delivering personalized, real-time services without the need for cloud-based computation.

Kangwook Lee, head of Package Development, taking part in a panel discussion with industry stakeholders

In a panel discussion, Kangwook Lee joined industry stakeholders to discuss the “Future Evolution of AI Chips and Infrastructure.”

(From the first image) Byungkyu Lee, Munuk Kim, and Senam Jang of DT; Jongoh Kwon, team leader of Package Development; Intae Whoang of P&T, Sunghyun Yoon of Infra Tech Center, and Junghan Kim of R&D; Jaeyung Jun and Kyungsoo Lee of Memory Systems Research, Sangsu Park of R&D; and Eunyoung Park, team leader of Safety Culture, giving presentations

In addition, Technical Leader Byungkyu Lee of Digital Transformation (DT) presented a talk titled “Eliminate Repetitive Tasks via E2E Automation and Shift to High Value-Added Work in Semiconductor Fabrication.” Meanwhile, Technical Leaders Munuk Kim and Senam Jang of DT delivered a joint presentation on “Improving Competitiveness of Production Quality by Intelligent Image Classification AI System Application.”

During another session, Jongoh Kwon, team leader of Package Development, along with Technical Leaders Intae Whoang of Package & Test (P&T), Sunghyun Yoon of Infra Tech Center, and Junghan Kim of R&D, covered the use of technologies in HBM. The presenters shared their technical insights on 16-layer HBM packaging technology, HBM production advancement using deep learning, and semiconductor research using AI. Meanwhile, Technical Leaders Jaeyung Jun, Kyungsoo Lee from Memory Systems Research and Sangsu Park from R&D spoke about future memory technologies. The presentation covered the potential of heterogeneous memory, requirements for on-device AI, and next-generation computational memory.

In a talk on AI services, Eunyoung Park, team leader of Safety Culture, attracted significant attention for her presentation titled “The Story of SK hynix’s Guardian, A Fusion of 24-Hour Unmanned Patrol Robot Ga-on and Vision AI.”

Booth: Groundbreaking AI Memory Lineup With Major Announcements

Under the theme “Deep Dive Into AI,” SK Group operated a booth with its subsidiaries. SK hynix’s full AI memory lineup was on display, including its latest HBM3E products.

(From the first image) The SK Group joint booth featured SK hynix’s key products, including: CMM-DDR5; AiMX; DDR5 MCR DIMM; eSSDs; LPCAMM2; LPDDR5X; Beetle X31; and automotive solutions

SK hynix also presented its CMM (CXL Memory Module)-DDR5¹¹ and AiMX, which are set to play a key role in the future. CMM-DDR5 can theoretically expand system bandwidth by up to 50% and capacity by up to 100% compared to systems equipped with only DDR5. Meanwhile, AiMX is an accelerator card with multiple GDDR6-AiM¹² chips that performs both storage and computation functions to improve AI performance.

¹¹CXL Memory Module-DDR5 (CMM-DDR5): A next-gen DDR5 memory module based on CXL that enhances system bandwidth, speed, and performance for AI, cloud, and high-performance computing.
¹²Accelerator-in-Memory (AiM): SK hynix’s product name for PIM semiconductors, including GDDR6-AiM.

Visitors to the booth could also check out DDR5 MCR DIMM¹³, an ultra-fast memory module for high-performance computing (HPC) and AI servers which reaches speeds of up to 8.8 gigabits per second (Gbps). In addition, LPCAMM2, an LPDDR5X¹⁴-based module solution, was highlighted as a product that will play an active role in on-device AI. Enterprise SSDs (eSSDs), including PS1010 E3.S, which are optimized for AI and data centers were also on display.

¹³Multiplexer Combined Ranks Dual In-line Memory Module (MCR DIMM): A module product with multiple DRAMs bonded to a motherboard in which two ranks, basic information processing units, operate simultaneously, resulting in improved speed.
¹⁴Low Power Double Data Rate 5 eXtended (LPDDR5X): Low-power DRAM for mobile devices, including smartphones and tablets, aimed at minimizing power consumption and featuring low voltage operation. LPDDR5X is the seventh generation product and was succeeded by LPDDR5T. The eighth generation LPDDR6 is under development.

The booth also featured AI-based systems and solutions. The company unveiled an AI-driven material quality prediction system and an automotive solution which attracted the attention of visitors.

“We provide AI memory solutions that span the entire spectrum of AI. Looking ahead, we are ready to create new experiences in the future with you,” said CEO Kwak. Following the successful announcement of the 16-layer HBM3E, SK hynix plans to further prepare for the future market in line with the vision presented at the SK AI Summit 2024.

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“Design is not just what it looks and feels like. Design is how it works.” These words of Apple Co-Founder Steve Jobs emphasize the crucial role design plays in the functionality of products. This is particularly true in the semiconductor industry, where design involves defining the chip’s architecture, purpose, and circuit layout to ultimately enable its smooth performance.

The chip design scheme can also play a key role in overcoming challenges. When faced with scaling and data transmission limitations while developing HBM3E¹, SK hynix introduced a pioneering 6-phase read-data-strobe (RDQS) design scheme. This world-first application enabled HBM3E to make huge strides in performance from its predecessor while maintaining the same packaging size.

This episode of Rulebreakers’ Revolutions reveals how SK hynix made the groundbreaking leap from the previous 4-phase to the 6-phase RDQS scheme, allowing the company to develop the world’s best-performing HBM3E with enhanced capacity and increased reliability.

¹HBM3E: The fifth-generation and latest High Bandwidth Memory (HBM) product. HBM is a high-value, high-performance product that revolutionizes data processing speeds by connecting multiple DRAM chips with through-silicon via (TSV).

Overcoming Scaling & Data Transmission Limitations in HBM3E

While there are challenges when developing any semiconductor product, the development and manufacturing process for HBM solutions comes with its own set of specific issues. For example, there are difficulties when mass-producing HBM due to its use of through-silicon via (TSV) for chip stacking. When developing HBM3E, SK hynix found that TSV presented obstacles to its goal of maintaining the same packaging size as the previous generation HBM3 while increasing capacity.

Originally applied in SK hynix’s first-generation HBM in 2013, TSV involves drilling microscopic holes in a DRAM chip to connect the electrodes that vertically penetrate the holes of the chip’s upper and lower layers. Due to these holes, TSV signals occupy a significant amount of space in peripheral circuits². As these circuits typically account for 20-30% of the total area in a memory product, the large number of TSV signals in HBM products hinders scaling efforts—resulting in a need for TSV area optimization.

SK hynix also targeted advancing HBM3E’s data transmission characteristics during development to ensure it could meet the heightened demands of the AI era. To meet this goal, the company focused on the CAS-to-CAS delay for reads (tCCDR) operation—the minimum time delay required for memory to read data consecutively from cells in different ranks³. In particular, SK hynix aimed to secure an increased tCCDR margin. This margin allows for deviations in timing to ensure that data can be transmitted accurately, ultimately improving system reliability.

²Peripheral circuit: A logic circuit that is responsible for selecting and controlling the cells that store data.
³Rank: A collection of basic data transmission units sent to the CPU from the DRAM module. A rank typically refers to 64 bytes of data to be transferred to the CPU as a bundle.

For HBM3E, the issue was that it becomes increasingly difficult to secure the minimum margin required for reliable data transmission during high-speed operation. This means that conflicts can occur when reading data across ranks at high speed, leading to potential read failures and a reduction in operational reliability.

Tasked with reducing the peripheral circuit size and improving the tCCDR margin, SK hynix turned its attention to developing a pioneering new design scheme which would open the door to the next-generation HBM3E.

A New Design: Leaping Forward With the World’s First 6-Phase RDQS Scheme

SK hynix overcame scaling and data transmission limitations in HBM3E by introducing the 6-phase RDQS scheme

Although SK hynix implemented several new design schemes and features in HBM3E, the world-first application of the 6-phase RDQS scheme was particularly notable. For HBM3, SK hynix had used the 4-phase RDQS scheme but the company saw an opportunity to push technical boundaries once again for HBM3E. This would ultimately enable the company to expand the memory capacity and improve the reliability of HBM3E.

Before looking at the advancements of the 6-phase RDQS scheme, it is prudent to consider the scheme’s role in HBM. The RDQS scheme is a circuit that produces the RDQS signals required for transmitting data from the HBM’s core dies, which contain the cells, to the base die, which contains the peripheral circuit. Overall, the RDQS scheme aims to minimize data skew⁴ from different ranks to avoid read failures.

⁴Data skew: The uneven distribution of data across different partitions in large-scale data processing. This can result in longer processing times as some partitions are required to handle more data than others.

Schematic diagrams showing the structural differences between the 4-phase and 6-phase RDQS schemes (upper diagrams) and a comparison of the schemes’ tCCDR margin (lower diagrams) (Source: Jinhyung Lee et al., High-Density Memories and High-Speed Interfaces, ISSCC 2024)

So how did the introduction of the 6-phase RDQS scheme reduce the size of the peripheral circuit? In the 4-phase RDQS scheme, multiple sets of FIFO-out data strobes⁵ (FDQS) and RDQS TSVs are required which inevitably leads to an increase of the peripheral area. The introduction of the 6-phase RDQS scheme can reduce the area of the peripheral circuit by cutting the number of FDQS and RDQS TSVs in half. This reduction of TSV signals means that the number of signals going back and forth between ranks is reduced, which can reduce the peripheral height.

⁵FIFO: A data structure that holds elements in the order they are received and provides access to those elements using a first-in, first-out basis.

Furthermore, the 6-phase RDQS scheme improved the tCCDR margin during the high-speed operation of HBM3E. This was realized as there is enough space between signals in the new scheme, so there is more margin for data transmission across ranks, or tCCDR operation. By securing this larger margin, the system becomes more tolerant of any deviations in timing, reducing the likelihood of read failures and therefore increasing system reliability.

Power in a Small Package: 6-phase RDQS Scheme Unlocks HBM3E

The application of the 6-phase RDQS scheme enabled HBM3E to maintain the same packaging size as HBM3 while offering improved density

The application of the 6-phase RDQS scheme contributed to the significant advancements in HBM3E’s key characteristics. First, the scheme enabled the reduction of the peripheral circuit height in the base die by 31%. Crucially, this reduction in the peripheral circuit height helped ensure that HBM3E has the same packaging size as HBM3 while offering an increased capacity from 16 Gb to 24 Gb.

In addition, the increased tCCDR margin stabilized the data transmission characteristics, which contributed to the enhancement in HBM3E’s data processing speed compared to its predecessor. While the 8-layer HBM3 can process up to 819 GB of data per second, the 8-layer HBM3E offers industry-leading data processing speeds of 1.18 terabytes (TB) per second. This rapid processing speed coupled with its vast capacity ensures HBM3E is optimized to meet the requirements of today’s AI applications.

Rulebreaker Interview: Youngjun Ku, Leading HBM Design

To find out more about the rulebreaking approach which led to the application of the 6-phase RDQS scheme to HBM3E, the SK hynix newsroom interviewed Technical Leader (TL) Youngjun Ku of Leading HBM Design. Ku discussed the significance of the new design scheme, as well as the challenges faced during the application process.

<Other articles from this series>

[Rulebreakers’ Revolutions] How MR-MUF’s Heat Control Breakthrough Elevated HBM to New Heights

[Rulebreakers’ Revolutions] How SK hynix Broke Barriers in Mobile DRAM Scaling With World-First HKMG Application

The post [Rulebreakers’ Revolutions] Innovative Design Scheme Helps HBM3E Reach New Heights first appeared on SK hynix Newsroom.

¹Open Innovation Platform (OIP): A comprehensive design technology infrastructure encompassing all areas of integrated circuit implementation which aims to promote innovation. Members include a variety of semiconductor design and manufacturing companies.
²High Bandwidth Memory (HBM): A high-value, high-performance product that revolutionizes data processing speeds by connecting multiple DRAM chips with through-silicon via (TSV).

SK hynix’s booth at the TSMC OIP Ecosystem Forum 2024

Innovation in Focus: Leading HBM, AI & Data Center Products at the Booth

Situated next to the main TSMC booth, the SK hynix booth featured two main sections which showcased the company’s global No. 1 HBM and AI/data center solutions, respectively.

The HBM section featured the company’s industry-leading HBM3E. Boasting rapid processing speeds, high capacity, and outstanding heat dissipation, HBM3E is optimized for AI applications. This section not only highlighted the technological achievements of SK hynix, but also illustrated the strategic importance of its collaboration with TSMC to push the boundaries of AI innovation. Moreover, SK hynix’s HBM leadership was further underlined by the company’s recent announcement that it had become the first in the industry to begin volume production of the 12-layer HBM3E.

In the AI and data center solutions section, SK hynix presented the industry’s first 16Gb DDR5 product built using the 1c node, the sixth generation of the 10 nm process. Compared to the previous generation, the new product offers 11% faster operating speeds of 8 gigabits per second (Gbps) and 9% greater power efficiency to help data centers cut electricity costs. Marking a significant advancement in DRAM scaling, the 1cnm technology is set to be applied to other SK hynix products in the future.

This section also featured other key products in SK hynix’s portfolio, including DDR5 MCR DIMM³, DDR5 3DS RDIMM⁴, LPCAMM2⁵, GDDR7⁶, and LPDDR5T⁷. Each solution reflects significant advancements in AI memory technology, catering to diverse needs from high-performance computing (HPC) to mobile and graphics-intensive applications.

³Multiplexer Combined Ranks Dual In-line Memory Module (MCR DIMM): A module product with multiple DRAMs bonded to a motherboard in which two ranks—basic information processing units—operate simultaneously, resulting in improved speed.
⁴3D Stacked Memory Registered Dual In-line Memory Module (3DS RDIMM): A high-density memory module used in servers and other applications to vertically connect DRAM dies through TSV, reducing module package height and boosting data transfer speeds.
⁵Low Power Compression Attached Memory Module 2 (LPCAMM2): LPDDR5X-based module solution that offers power efficiency and high performance as well as space savings. It offers performance levels equivalent to two DDR5 SODIMMs, making it optimized for on-device AI.
⁶Graphics DDR (GDDR): A standard specification of graphics DRAM defined by the Joint Electron Device Engineering Council (JEDEC) and specialized for processing graphics more quickly. It is now one of the most popular memory chips for AI and big data applications.
⁷Low Power Double Data Rate 5 Turbo (LPDDR5T): Low-power DRAM for mobile devices, including smartphones and tablets, aimed at minimizing power consumption and featuring low voltage operation. LPDDR5T is an upgraded product of the 7th generation LPDDR5X and will be succeeded by the 8th generation LPDDR6.

Other products on display included DDR5 MCR DIMM, DDR5 3DS RDIMM, LPCAMM2, LPDDR5T, and GDDR7

Presentation on 2.5D SiP Study for Enhancing HBM Quality & Reliability

During the forum, SK hynix’s Byoungdo Lee, Technical Leader of HBM PKG TE, gave a talk titled “A Collaborative Study on 2.5D System-in-Packages for Better Quality and Reliability of HBM.” Having encountered limitations using a proxy package to accurately recreate SiP⁸ conditions for the study, SK hynix opted to conduct open collaboration with companies including TSMC. This collaboration included preliminary evaluations as well as thermal and mechanical simulations at the SiP level. The study found that HBM products with SK hynix’s MR-MUF⁹ technology offer greater quality and reliability, and are ultimately able to overcome stacking limitations.

Additionally, the presentation covered three main advancements for HBM4, the upcoming sixth generation of HBM. Lee addressed the use of base logic die wafers¹⁰ to improve performance and power efficiency, as well as the development of 16-layer HBM utilizing Advanced MR-MUF or hybrid bonding¹¹ packaging technology to meet demand for higher density products. Lastly, Lee spoke about planned SiP-level verification developments which aim to mitigate risks associated with the increased total product thickness.

⁸System-in-Package (SiP): A method of stacking and connecting multiple semiconductor chips in a single package to improve performance and efficiency, enabling advanced functions like high-speed data processing.
⁹Mass reflow-molded underfill (MR-MUF): A technology that ensures secure and reliable connections in densely stacked chip assemblies by melting the bumps between stacked chips.
¹⁰Base logic die wafer: A foundational semiconductor layer that contains the memory controller and logic circuitry, enabling high-speed communication between the stacked memory dies and the system.
¹¹Hybrid bonding: A technology that stacks two or more chips atop one another in the same package, enabling high-density interconnections crucial for advanced HBM products.

SK hynix’s Byoungdo Lee presenting an OIP Partner Technical Talk on enhancing HBM

Strengthening AI Memory Leadership & Strategic Partnerships

At the TSMC OIP Ecosystem Forum 2024, SK hynix underlined its AI memory leadership and strengthened key industry partnerships. By showcasing key products such as the industry-leading HBM3E and the world’s first 1cnm DDR5 product, the company emphasized its ability to break technological boundaries. Looking ahead, the company is set to continue advancing its portfolio through collaboration with global partners to meet the growing needs of the AI era.

The post SK hynix Spotlights AI Memory Solutions & Industry Collaboration at TSMC OIP Ecosystem Forum 2024 first appeared on SK hynix Newsroom.

• The company plans to supply the highest-performing, highest-capacity 12-layer HBM3E to customers by the end of the year
• DRAM chips made 40% thinner to increase capacity by 50% at the same thickness as the previous 8-layer product
• The company to continue HBM’s success with outstanding product performance and competitiveness

Seoul, September 26, 2024

SK hynix Inc. (or “the company”, www.skhynix.com) announced today that it has begun mass production of the world’s first 12-layer HBM3E product with 36GB¹, the largest capacity of existing HBM² to date.

¹Previously, the maximum capacity of HBM3E was 24GB from eight vertically stacked 3GB DRAM chips.
²HBM (High Bandwidth Memory): This high-value, high-performance memory vertically interconnects multiple DRAM chips and dramatically increases data processing speed in comparison to traditional DRAM products. HBM3E is the extended version of HBM3, the fourth generation product that succeeds the previous generations of HBM, HBM2 and HBM2E.

The company plans to supply mass-produced products to customers within the year, proving its overwhelming technology once again six months after delivering the HBM3E 8-layer product to customers for the first time in the industry in March this year.

SK hynix is the only company in the world that has developed and supplied the entire HBM lineup from the first generation (HBM1) to the fifth generation (HBM3E), since releasing the world’s first HBM in 2013. The company plans to continue its leadership in the AI memory market, addressing the growing needs of AI companies by being the first in the industry to mass-produce the 12-layer HBM3E.

According to the company, the 12-layer HBM3E product meets the world’s highest standards in all areas that are essential for AI memory including speed, capacity and stability. SK hynix has increased the speed of memory operations to 9.6 Gbps, the highest memory speed available today. If ‘Llama 3 70B’³, a Large Language Model (LLM), is driven by a single GPU equipped with four HBM3E products, it can read 70 billion total parameters 35 times within a second.

³Llama 3: Open-source LLM released by Meta in April 2024, with 3 sizes in total: 8B (Billion), 70B, and 400B.

SK hynix has increased the capacity by 50% by stacking 12 layers of 3GB DRAM chips at the same thickness as the previous eight-layer product. To achieve this, the company made each DRAM chip 40% thinner than before and stacked vertically using TSV⁴ technology.

The company also solved structural issues that arise from stacking thinner chips higher by applying its core technology, the Advanced MR-MUF⁵ process. This allows to provide 10% higher heat dissipation performance compared to the previous generation, and secure the stability and reliability of the product through enhanced warpage controlling.

⁴TSV (Through Silicon Via): This advanced packaging technology links upper and lower chips with an electrode that vertically passes through thousands of fine holes on DRAM chips.
⁵MR-MUF (Mass Reflow Molded Underfill): The process of stacking semiconductor chips, injecting liquid protective materials between them to protect the circuit between chips, and hardening them. The process has proved to be more efficient and effective for heat dissipation, compared with the method of laying film-type materials for each chip stack. SK hynix’s advanced MR-MUF technology is critical to securing a stable HBM mass production as it provides good warpage control and reduces the pressure on the chips being stacked.

“SK hynix has once again broken through technological limits demonstrating our industry leadership in AI memory,” said Justin Kim, President (Head of AI Infra) at SK hynix. “We will continue our position as the No.1 global AI memory provider as we steadily prepare next-generation memory products to overcome the challenges of the AI era.”

About SK hynix Inc.

SK hynix Inc., headquartered in Korea, is the world’s top-tier semiconductor supplier offering Dynamic Random Access Memory chips (“DRAM”), flash memory chips (“NAND flash”), and CMOS Image Sensors (“CIS”) for a wide range of distinguished customers globally. The company’s shares are traded on the Korea Exchange, and the Global Depository shares are listed on the Luxembourg Stock Exchange. Further information about SK hynix is available at www.skhynix.com, news.skhynix.com.

Media Contact

SK hynix Inc.
Global Public Relations

Technical Leader
Sooyeon Lee
E-Mail: global_newsroom@skhynix.com

Technical Leader
Kanga Kong
E-Mail: global_newsroom@skhynix.com

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FMS 2024 features a broader focus on different memory types compared to previous years

SK hynix has returned to Santa Clara, California to present its full array of groundbreaking AI memory technologies at FMS: the Future of Memory and Storage (FMS) 2024 from August 6–8. Previously known as Flash Memory Summit, the conference changed its name to reflect its broader focus on all types of memory and storage products amid growing interest in AI. Bringing together industry leaders, customers, and IT professionals, FMS 2024 covers the latest trends and innovations shaping the memory industry.

Participating in the event under the slogan “Memory, The Power of AI,” SK hynix is showcasing its outstanding memory capabilities through a keynote presentation, multiple technology sessions, and product exhibits.

Keynote Presentation: Envisioning the Future of AI With Leading Memory & Storage Solutions

Keynote presentations have always been a highlight at FMS. The talks act as an important forum for attendees to learn about emerging memory and storage technologies from industry leaders. Due to its leadership in the AI memory field, SK hynix was selected to give a keynote presentation titled “AI Memory and Storage Solution Leadership and Vision for the AI Era” at the newly expanded event.

Held on the first day of FMS 2024, the keynote was delivered by Vice President Unoh Kwon, head of HBM Process Integration (PI) and Vice President Chunsung Kim, head of SSD Program Management Office (PMO). The pair provided insights into the company’s DRAM and NAND flash solutions which aim to solve the pain points of generative AI and promote continued development of AI. These pain points include maximizing the efficiency of AI training and inference¹ while minimizing floor space and power utilization for storing data.

¹AI inference: The process of running live data through a trained AI model to make a prediction or solve a task.

Kwon and Kim delivering their keynote on SK hynix’s leading AI memory products

Each speaker covered a particular type of memory. Kwon touched on the company’s DRAM memory products that are optimized for AI systems such as HBM², CXL®³, and LPDDR5T⁴. Meanwhile, Kim introduced the company’s best-in-class NAND flash storage devices including its SSD and UFS⁵ solutions, which will continue to be crucial for AI applications in the future.

²High Bandwidth Memory (HBM): A high-value, high-performance product that revolutionizes data processing speeds by connecting multiple DRAM chips with through-silicon via (TSV).
³Compute Express Link^® (CXL^®): A PCIe-based next-generation interconnect protocol on which high-performance computing systems are based.
⁴Low Power Double Data Rate 5 Turbo (LPDDR5T): Low-power DRAM for mobile devices aimed at minimizing power consumption and featuring low voltage operation. LPDDR5T is an upgraded product of the LPDDR5X and will be succeeded by LPDDR6.
⁵Universal Flash Storage (UFS): A high-performance interface for computing and mobile systems which require low power consumption.

In addition to its keynote, SK hynix also held five sessions that took a deeper look into its next-generation products set to solidify the company’s AI technology leadership. These sessions covered a variety of topics, including the company’s DRAM, SSD, and CXL solutions.

Product Booth: Presenting the Industry’s Best AI Memory

SK hynix’s booth at FMS 2024 consists of four sections showcasing many of the products which featured in the company’s keynote and session talks. One of the booth’s highlights is the samples of the 12-layer HBM3E, the next-generation AI memory solution which is expected to be mass-produced in the third quarter of 2024. The company is also holding demonstrations of select products with its partners’ systems, highlighting its strong collaboration with various major tech companies.

The AI Memory and Storage section includes industry-leading solutions such as SK hynix’s HBM3E and eSSD portfolio

• AI Memory and Storage: Features SK hynix’s flagship AI memory products such as samples of its 12-layer HBM3E, which is set to be the same height as the previous 8-layer version under JEDEC⁶ standards. The section also includes GDDR6-AiM⁷, a product suitable for machine learning due to its computational capabilities and rapid processing speeds, and the ultra-low power LPDDR5T optimized for on-device AI. Storage solutions on display include the PCIe Gen5-based eSSD PS1010, which is ideal for AI, big data, and machine learning due to its rapid sequential read speed.

⁶Joint Electron Device Engineering Council (JEDEC): A U.S.-based standardization body that is the global leader in developing open standards and publications for the microelectronics industry.
⁷Accelerator in Memory (AiM): A special-purpose hardware made using processing and computation chips.

At the NAND Tech, Mobile, and Automotive section, attendees can see products such as the company’s 321-layer NAND and ZUFS 4.0

• NAND Tech, Mobile, and Automotive: This section includes solutions such as the world’s highest 321-layer wafer technology as well as triple-level cell (TLC) and QLC NAND. Mobile technologies are also showcased including ZUFS⁸ 4.0, an industry-best NAND product optimized for on-device AI⁹ which boosts a smartphone’s operating system speed compared to standard UFS.

⁸Zoned Universal Flash Storage (ZUFS): A NAND flash product that improves efficiency of data management. It optimizes data transfer between an operating system and storage devices by storing data with similar characteristics in the same zone of the UFS.
⁸On-device AI: A technology that implements AI functions on the device itself, instead of going through computation by a physically separated server.

The AI PC and CMS 2.0 section features a demonstration of the company’s industry-leading SSD, PCB01

• AI PC and CMS 2.0: Attendees can see a system demonstration of the industry-best SSD PCB01, which is able to efficiently process large AI computing tasks when applied to on-device AI PCs. In addition, CMS¹⁰ 2.0, a next-generation memory solution that boasts equivalent data processing capabilities as a CPU, is applied to a vector database¹¹.

¹⁰Computational Memory Solution (CMS): A product that integrates computational functions into CXL memory.
¹¹Vector Database: A collection of data stored as mathematical representations, or vectors. As similar vectors are grouped together, vector databases can make low-latency inquiries, making them ideal for AI.

The OCS, Niagara, CMM section displays innovative solutions such as Niagara 2.0 and HMSDK

• OCS, Niagara, and CMM: This section features a demonstration of OCS¹² technology which enhances the data analysis and pooled memory solution Niagara 2.0¹³. It also includes a demonstration of CMM¹⁴– DDR5¹⁵, which expands system bandwidth by 50% and capacity by up to 100% compared to systems only equipped with DDR5.

¹²Object-based Computational Storage (OCS): A new computational storage platform for data analytics in high-performance computing. OCS has not only high scalability but also data-aware characteristics that enable it to perform analytics independently without help from compute nodes.
¹³Niagara 2.0: A solution that connects multiple CXL memories together to allow numerous hosts such as CPUs and GPUs to optimally share their capacity. This eliminates idle memory usage while reducing power consumption.
¹⁴CXL Memory Module (CMM): A new standardized interface that has an advantage in scalability and helps increase the efficiency of CPUs, GPUs, accelerators, and memory.
¹⁵Double Data Rate 5 (DDR5): A server DRAM that effectively handles the increasing demands of larger and more complex data workloads by offering enhanced bandwidth and power efficiency compared to the previous generation, DDR4.

Super Women Conference: Cherishing Diversity in the Memory & Storage Industry

Haesoon Oh delivers the keynote at the FMS Super Women Conference

SK hynix also co-sponsored the FMS Super Women Conference, an event held on the sidelines of FMS 2024 which celebrates the achievements of female leaders and promotes diversity in the memory industry. Head of NAND Advanced PI Haesoon Oh, the company’s first female executive-level research fellow, delivered a keynote address on the company’s next-generation innovations and the importance of understanding diversity.

Paving the Way Forward in the AI Era

At FMS 2024, SK hynix underlined its commitment to lead the industry by providing integrated AI memory solutions and expanding its expertise in the sector. Collaborating with other leading partners, the company will strive to provide customers with the best possible solutions that match their rapidly changing needs.

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