“It always seems impossible until it’s done.” This famous quote from Nelson Mandela underlines the importance of continually overcoming seemingly unsurmountable challenges to achieve a goal, an approach which is essential to succeed in the rapidly evolving semiconductor sector.

As industry standards are consistently updated, semiconductor companies are tasked with finding the necessary technical solutions to comply with these criteria. SK hynix has a long track record in this area, as recently exemplified by its ability to meet the increased speed standards for the latest GDDR¹ graphics DRAM, GDDR7.

¹Graphics DDR (GDDR): A standard specification of graphics DRAM defined by the Joint Electron Device Engineering Council (JEDEC) and specialized for processing graphics more quickly. It is now one of the most popular memory chips for AI and big data applications.

This episode of Rulebreakers’ Revolutions will focus on how the company’s design and technical innovations coupled with cross-departmental collaboration enabled it to develop the industry-leading GDDR7 with the highest levels of speed.

The Mission: Finding Technical Solutions to Meet GDDR7 Speed Standards

Traditionally used in graphics and gaming, GDDR DRAM is now applied to a broader range of fields including AI, high-performance computing (HPC), and autonomous driving. This is due to its parallel processing capability and advanced specifications such as high speed and power efficiency which have increased with each generation.

To satisfy increased industry speed standards for GDDR7, SK hynix derived key design and technical innovations

The standards for GDDR memory are set by the Joint Electron Device Engineering Council (JEDEC), the global standardization body for the microelectronics industry. These include ever-increasing speed requirements, progressing for example from GDDR5’s data rate of 5–10 gigabits per second (Gbps) per pin to GDDR6’s speed of 14–20 Gbps. For GDDR7, JEDEC set a target data rate range of 24 –32 Gbps, placing additional pressure on semiconductor companies to adapt to meet the latest specifications.

One of the main changes in the GDDR7 standards to facilitate these rapid speeds was the introduction of a new signaling interface. For the first time in a JEDEC standard for DRAM products, GDDR7 called for the use of the innovative PAM² method for high frequency operations. Unlike the traditional NRZ³ interface which uses two levels to transmit data, the new PAM3 system employs three levels, enabling a higher data transmission rate for improved performance.

²Pulse amplitude modulation (PAM): A signaling process that encodes a continuous analog signal into discrete analog pulses by representing the signal’s amplitude as a binary number at a specific time.
³Non-return-to-zero (NRZ): A simple signaling interface which sends information over two levels of a signal. As the name suggests, the signal does not return to zero during between bits.

By using three levels to transmit data, PAM3 offers faster data transmission rates than the two-level NRZ interface

To support the required rapid data rate specifications and PAM3 interface, GDDR7 products needed to incorporate several new cutting-edge technologies and design innovations. In addition to these technical challenges, SK hynix also had to overhaul the testing approach it used for GDDR6. During these tests, the company faced difficulties in ensuring the same performance in real-world system environments as it achieved in the device testing phase.

Tasked with devising technological innovations and rethinking its testing approach, SK hynix tapped into its design knowhow, company-wide expertise, and well-established ability to take on new challenges.

Design Innovations, Collaboration, & New Testing Approach to Reach Speed Goals

SK hynix drew from its experience developing GDDR6 and embraced cross-departmental collaboration for GDDR7, enhancing several key design elements and integrating advanced technologies to hit the product’s ambitious speed targets.

In a company-first for a mass-produced DRAM product, SK hynix integrated a T-coil⁴ inductor following multiple tests and evaluations to optimize its metal layers. T-coils improve signal integrity by mitigating high-frequency losses, thereby expanding the data eye margin⁵ and facilitating reliable high-speed data transfer.

⁴T-coil: An inductive circuit commonly used in analog and radio frequency electronics to improve signal integrity and overall circuit performance.
⁵Data eye margin: The safety buffer within a digital signal’s eye diagram, a representation of signal integrity, that ensures reliable data transmission in high-speed communication systems.

SK hynix derived several design innovations to attain GDDR7’s increased speed standards

SK hynix also implemented an established and robust write clock (WCK) framework, a high-speed clock signal dedicated to data input and output operations. This design allows for precise timing control for data transfers, resulting in higher data rates. To maintain stable data transmission at high speeds, the company also increased the number of heat-dissipating substrate layers from four to six and applied EMC⁶ as the packaging material to reduce thermal resistance.

⁶Epoxy Molding Compound (EMC): An essential material for semiconductor packaging that seals chips to protect them from water, heat, and shock damage.

As part of efforts to improve its testing environment and ensure consistent performance, the company put together a specialized taskforce. This team established an evaluation, analysis, and management environment that could ensure consistency between simulation results and actual system implementation. Additionally, the taskforce outlined key design parameters to secure characteristics in system environments and developed circuit schemes for high-speed operation.

Regarding PAM3 testing, SK hynix first confirmed the feasibility of PAM3 operation by producing a test chip. Moreover, the company needed a solution to test PAM3 on existing mass-produced devices which use NRZ signaling. Through collaboration with related departments and test working group activities, the company carried out functional verification and mass production testing of PAM3 using NRZ signaling equipment. This enabled SK hynix to extend GDDR7’s multi-level I/O verification capabilities without requiring completely new testing infrastructure.

Aside from innovations related to improving speed or integrating PAM3 signaling, SK hynix also secured a competitive edge in power efficiency for its GDDR7 by supporting heterogeneous power modes. Through this advancement which allowed the product to function at lower voltages, the company was able to achieve significant power savings.

Redefining Standards in Speed & Power Efficiency

Boasting a rapid data rate and data processing speed, the GDDR7 offers industry-leading specifications

As a result of its strong internal collaboration, ability to overcome technological obstacles, and previous GDDR experience, SK hynix was able to develop the industry-leading GDDR7 in July 2024. The groundbreaking product achieved an industry-leading data rate of 32 Gbps—over 60% faster than the previous generation—which can rise to up to 40 Gbps depending on the circumstances.

When adopted for high-end graphics cards, SK hynix’s GDDR7 offers a data processing speed of more than 1.5 TB per second, equivalent to processing 300 Full HD movies each with a capacity of 5 GB, in a second. Overall, the product offers a 74% reduction in thermal resistance compared with the previous generation.

In addition to improved speed and heat dissipation, SK hynix enhanced the product’s power efficiency by more than 50% compared with the previous generation. This is particularly crucial to ensure GDDR7 can maintain its high performance for demanding applications such as AI while minimizing energy consumption.

These performance breakthroughs position SK hynix’s GDDR7 as the world’s highest-spec GDDR7. The development ensured SK hynix not only advanced the product’s characteristics but also established high-speed features that will benefit other DRAM products, such as mobile memory, bolstering its leadership in high-speed solutions.

Rulebreaker Interview: Jinyoup Cha, Graphic Design

The SK hynix Newsroom spoke with Jinyoup Cha, team leader of Graphic Design, a team in the DRAM Design department responsible for designing graphic DRAMs, to learn more about the company’s innovative approach to GDDR development. Having led the design of GDDR7, Cha is well-positioned to discuss the challenges of continually improving speed characteristics and the goals for next-generation GDDR memory.

<Other articles from this series>

[Rulebreakers’ Revolutions] How MR-MUF’s Heat Control Breakthrough Elevated HBM to New Heights

[Rulebreakers’ Revolutions] How SK hynix Broke Barriers in Mobile DRAM Scaling With World-First HKMG Application

[Rulebreakers’ Revolutions] Innovative Design Scheme Helps HBM3E Reach New Heights

[Rulebreakers’ Revolutions] How SK hynix’s Server DRAM Validation Process Succeeds in a Diverse Server CPU Market

[Rulebreakers’ Revolutions] Flexible & Collaborative eSSD Virtualization Development for Today’s Data Centers

The post [Rulebreakers’ Revolutions] How SK hynix’s Design Innovations Pushed GDDR7 to New Limits of Speed first appeared on SK hynix Newsroom.

What Is Product Reliability?

The quality of a semiconductor product is determined by how successfully it meets the required standards and properties. Meanwhile, the reliability of a semiconductor device is defined as the probability that it can maintain its quality without failures over a set period of time, thereby increasing customer satisfaction and the likelihood of repeat purchases. In this case, failures refer to errors that occur during the use of the product, while defects are errors that occur during the product’s manufacturing or inspection. Therefore, the product is said to be of poor quality if it has many defects, while it is considered to be unreliable if failures occur frequently or while it is under warranty.

▲ Figure 1. A table showing the differences between quality and reliability (Source: Hanol Publishing)

Figure 1 shows a more comprehensive breakdown of the differences in the meanings and characteristics of quality and reliability. To give a more detailed definition, reliability is the ability of a system, part, or material to maintain its initial quality and performance over a specific amount of time, distance, or amount of use. This must be achieved without experiencing failures under given conditions such as manner of usage or environmental factors. As a result, it is crucial for semiconductor companies to assess whether their quality and reliability levels have reached industry standards before commencing mass production. These levels should also be regularly examined while products are being mass produced.

As an important step to evaluating product reliability, the standards of reliability must be clearly defined in advance. In the case of a company that ships 100 products, some of the following questions would need to be considered: How many of the products should be operational after three years? What are the observable patterns in the product’s operation time? Can it be guaranteed that 90 out of 100 products will be operational after five years? How long will 95 out of 100 products still function properly?

Tests are required to verify these standards. Although it would be ideal to run tests for three years, five years and even longer to determine a product’s reliability at these stages, concentrating so much time on the product’s evaluation would delay mass production for too long. Therefore, companies use accelerated testing and statistical techniques to assess reliability. Calculations such as reliability functions, lifetime distributions, and the average lifetime are also used to complete a reliability validation in a relatively short amount of time.

JEDEC Standards

Companies that design and manufacture semiconductors evaluate the reliability of their own products and provide customers with the results. Customers can use the results to determine whether the product meets their needs or decide to perform their own reliability assessments. However, if a semiconductor company and its customers have different evaluation criteria, they must go through the trouble of aligning their different standards. As a solution, semiconductor companies usually adhere to standards from the JEDEC Solid State Technology Association¹, commonly referred to as JEDEC, to satisfy the needs of the company and its customers.

¹JEDEC Solid State Technology Association: The leading organization in developing open standards and publications for the microelectronics industry.

JEDEC’s primary role is to enable manufacturers and organizations to jointly review and establish uniform standards for electronic devices such as integrated circuits (ICs). As the specifications set by JEDEC have become widely accepted as the international standard, JEDEC is in effect the standards-setting organization for the semiconductor industry worldwide.

The organization’s board of directors (BoD) determines the policies and procedures and has the final approval of JEDEC standards. Additionally, there are also numerous JEDEC committees (JC) which set standards for the respective fields that they are specialized in. For the semiconductor industry, the following are some of the important committees and their roles: JC-14 Quality and Reliability of Solid State Products is responsible for reliability standards; JC-11 Mechanical Standardization sets standards for outlines of modules and semiconductor packages; JC-42 Solid State Memories sets standards for DRAMs; and JC-63 Multiple Chip Packages decides on standards for mobile multi-chip packages.

If a company needs to have a standard created for one of its products, the company submits a standard proposal to be voted on by the respective committee members. Each company has the right to one vote, regardless of its size. Proposals that are approved by a committee are then voted on again by the BoD, and proposals that are passed by the board are finally made into JEDEC standards and publicized to the respective industries.

Reliability Tests for Assessing Product Lifetimes

In addition to international evaluation standards, there are also numerous metrics used to assess product reliability. These include the various assessments which evaluate the lifetime of semiconductor products.

Early Failure Rate

The early failure rate (EFR) estimates the number of device failures which occur within a year in the user environment. For some product lines, however, this period can be reduced to six months or increased to over a year depending on the system’s lifetime or products that specifically require higher reliability. Burn-in² screens products that are likely to fail in a short amount of time, while the EFR is used to verify whether the potential failure rate of these screened products is maintained at an acceptable level (see Figure 2). The test conditions are set and evaluated using the acceleration factor for the temperature and voltage of the relevant semiconductor product.

²Burn-in: A test that stresses a product with voltage and temperature in order to eliminate potential defects in the product at an early stage. Burn-in performed after packaging is called test during burn-in (TBDI).

▲ Figure 2. The early failure rate (EFR) zone within a bathtub curve, which represents three phrases of a product’s failure rate over time (Source: Hanol Publishing)

High & Low Temperature Operating Life Tests

The high temperature operating life (HTOL) test is one of the most common types of product lifetime evaluations. It assesses issues that arise from temperature and voltage stress during a product’s operation. The HTOL test is also considered to be comprehensive as it not only assesses premature failures but also identifies failures caused by accidents or wear and tear. Meanwhile, the low temperature operating life (LTOL) test assesses the likelihood of failures due to the impact of hot carriers³. However, due to the application of voltage and temperature, there is also the possibility of other failures occurring.

³Hot carrier: Traveling electrons that become excessively mobile due to the high electric field deriving from transistors shrinking in size and causing the channel length to become shorter, which increases the electric field. This short channel effect occurs in semiconductor transistors.

High Temperature Storage Life

The high temperature storage life (HTSL) test evaluates the reliability of a product under high-temperature storage conditions. Such conditions can affect the lifetime of a product due to diffusion, oxidation, intermetallic growth, and chemical degradation of package materials.

Endurance & Data Retention

The endurance test evaluates how many program/erase (PE) cycles products such as NAND flash memory can withstand. Regarding NAND, a key reliability factor of these products is data retention as it measures how long data will be stored in a cell for a given period of time even in the absence of power.

Reliability Tests for Various Surrounding Conditions

There are numerous surrounding conditions that may contribute to the failure of a semiconductor product. This is why tests are required to assess the ability of products to withstand certain surrounding conditions before they are shipped to their respective destinations.

Preconditioning

After a product has been shipped and stored, preconditioning assesses potential problems that may occur during a customer’s manufacturing process as hygroscopic⁴ and thermal stress can result in reliability issues. Preconditioning evaluates packaging reliability in humid conditions by replicating conditions where the product is sold, shipped to the customer, unpacked from its vacuum packaging, and mounted in the system. This treatment is used as a precursor for reliability tests of surrounding conditions, including temperature humidity bias (THB), the highly accelerated stress test (HAST), and thermal cycle (TC).

⁴Hygroscopic: The phenomenon of absorbing moisture from the air. In semiconductors, this absorption of moisture can lead to failures.

The evaluation follows the order of TC, bake, soak, and reflow. Figure 3 shows how preconditioning applies to the processes of packaging, transportation, and mounting to the system.

▲ Figure 3. Relationship of production, transportation, and usage to preconditioning test conditions (Source: Hanol Publishing)

Thermal Cycle

A thermal cycle (TC) assesses a product’s tolerance to instantaneous temperature changes that may occur in different user environments. Semiconductor packages and modules are composed of various materials with different coefficients of thermal expansion⁵ (CTE) which can lead to stress-induced fatigue failures. This stress is caused by shrinkage and expansion which occurs following thermal changes.

⁵Coefficient of thermal expansion (CTE): A material property that indicates the extent to which a material expands upon heating.

The primary purpose of a TC is to measure the stress tolerance of a semiconductor package in relation to temperature changes, but high and low temperature stresses can cause many other failures. Prolonged thermal shocks verify the potential for interfacial delamination⁶, internal and external package cracks, and chip cracks caused by factors such as stress from each package material or thermal expansion. In addition, as the importance of solder joints is increasing due to restrictions on the use of hazardous materials including lead and the expansion of applications such as mobile devices, a TC can effectively evaluate the reliability of solder joints.

⁶Interfacial delamination: The separation of interfaces in a semiconductor package.

Temperature Humidity Storage & Temperature Humidity Bias Tests

The temperature humidity storage (THS) test assesses the tolerance of semiconductor products in high temperatures and humidity. To determine the appropriate exposure time, it is recommended to simulate the actual user environment by measuring the amount of moisture absorption after opening the moisture-proof package. Meanwhile, temperature humidity bias (THB) evaluates moisture resistance by subjecting the product to an electrical bias⁷. Although most failures are caused by aluminum corrosion, other potential problems can arise from temperature stress. This test also identifies package reliability issues such as pad metal corrosion due to moisture penetrating through micro gaps between leads and mold pores, and failures caused by moisture infiltrating through pores or holes in the protective film.

⁷Electrical bias: The deliberate application of direct current (DC) between two points for the purpose of controlling a circuit.

Pressure Cooker Test

The pressure cooker test (PCT), which is more rigorous than THS and THB, is an ideal early assessment of moisture resistance. Also known as an autoclave⁸, the test evaluates the moisture resistance of a plastic mold compound and assesses the reliability of the mold structure by infiltrating moisture using 100% relative humidity and high pressure. Additionally, it identifies problems arising from moisture penetration between the leads and through pores in the mold.

⁸Autoclave: A high-pressure cooker. When water is added while the cooker is sealed at high temperature, the water evaporates and increases the pressure and humidity to create the conditions necessary for the specimen inside the autoclave.

Similar to THS, the PCT used to be an essential reliability test for thick semiconductor packages. However, recent international trends, including JEDEC’s assessment, suggest that the stress magnitude is too high for current packages. Thus, the test is used selectively depending on the type of package. The PCT is used for leadframe products, while the unbiased highly accelerated stress test (UHAST) is used for substrate products.

Unbiased Highly Accelerated Stress Test, Highly Accelerated Stress Test & High Accelerated Life Test

The UHAST evaluates reliability by applying stresses similar to those applied by a PCT to thin packages of substrate-type products, such as fine-pitch ball grid array (FBGA) packages. There are also similarities in their ability to identify and discover types of failures. While the PCT applies stress by using saturated humidity, or 100% relative humidity, the UHAST uses unsaturated humidified conditions at 85% relative humidity that is similar to the customer user environment. Galvanic corrosion⁹ or direct chemical corrosion are mainly employed for this evaluation.

⁹Galvanic corrosion: An electrochemical process whereby a more active metal (anode) corrodes in preference to a more resistant metal (cathode) that it is in contact with through an electrolyte.

An additional evaluation is the highly accelerated stress test (HAST) which is used to assess the reliability of non-hermetic packages operating in humid environments. It uses the same method as THB, as pins with static bias applied undergo temperature, humidity, and pressure stresses. Lastly, the highly accelerated life test (HALT) is a quick stress test that helps identify and correct defects during the product design phase.

Reliability Tests for Mechanical Factors

Semiconductor products are subjected to environmental stresses caused by mechanical, climatic, and electrical factors during their handling, storage, transportation, and operation. These loads significantly affect the design reliability of the equipment. For this reason, it is necessary to evaluate products under development or in mass production to identify abnormalities. Manufacturers can subject products to physical stresses such as vibration, shocks, and drops during the assessment process.

Shock

Shock testing evaluates resistance to simulated impacts that may occur during handling and transportation. Typical shock tests include the hammer shock test, which involves fixing a test sample in place and striking it with a hammer, and the drop test, in which a product is subjected to a free-fall drop. The hammer shock test assesses how well a product withstands the force and pulse of the hammer, as well as the number of impacts it can endure. In the case of the drop test, the test subject is dropped in free fall from a height of 1 to 1.2 meters to reflect the actual working environment of the user.

Vibration, Bending & Torsion

Vibration is an assessment of the product’s resistance to vibrations that may occur when the product is being transported. It usually employs sine vibration¹⁰ testing in compliance with JEDEC standards.

¹⁰Sine vibration: A vibration that varies in frequency over time.

Other tests include the bending test, which assesses solder joint defects caused by warping or bending on the printed circuit board (PCB), as well as the torsion test. Also referred to as the twist or torque test, the torsion test evaluates the resistance to solder joint problems and product warpage that may occur on the PCB when it is subjected to torsional stress.

Ensuring Reliable Semiconductor Products

The reliability tests and standards discussed in this episode serve as the foundation for ensuring that these vital components meet the stringent demands of today’s technology-driven world. From tests for surrounding conditions and mechanical factors to product lifetime evaluations, the various assessments show that the semiconductor industry is committed to producing reliable and durable products. In particular, SK hynix is doing its utmost to ensure its products meet the highest reliability standards and exceed customer expectations. Going forward, the company will continue refining and reviewing its reliability testing to keep pace with the ever-evolving technological landscape.

Read articles from the Front-End Process series

Read articles from the Back-End Process series

The post Semiconductor Back-End Process Episode 11: Reliability Tests and Standards for Semiconductor Packages first appeared on SK hynix Newsroom.

• LPDDR5T’s 9.6 Gbps operating speeds verified using MediaTek’s next-generation flagship mobile chipset
• SK hynix to strengthen technology leadership by supplying the world’s fastest mobile DRAM

SK hynix’s LPDDR5T (Low Power Double Data Rate 5 Turbo) has completed performance verification for application with MediaTek’s next-generation mobile APs. Developed in January 2023, the LPDDR5T is the world’s fastest mobile DRAM, achieving operating speeds of 9.6 gigabits per second (Gbps).

Defying Expectations to Achieve Groundbreaking Operating Speeds

SK hynix provided samples of its LPDDR5T to MediaTek, a leading global fabless semiconductor company, in February 2023 for testing. The performance tests were carried out using the next-generation MediaTek Dimensity flagship chipset, which is part of their Dimensity Platform series of mobile APs. Set to launch within this year, MediaTek’s next-generation flagship mobile chipset will utilize 9.6 Gbps memory—the fastest operating speed for mobile devices.

The global semiconductor industry had previously projected that operating speeds of up to 9.6 Gbps would only be achievable with future iterations such as the LPDDR6, which is scheduled to be released after 2026. SK hynix has expedited this timeline with the LPDDR5T.

Applied to a Range of Mobile Devices for 2024 Debut

As the standardization approval process with the Joint Electron Device Engineering Council (JEDEC) is already in its final stages, the LPDDR5T is gearing up for its full market debut. SK hynix predicts that the generational change of DRAM for mobile devices will accelerate from next year when products are standardized and market supply begins in earnest.

“As a result of our close collaboration with SK hynix, MediaTek’s next-generation flagship Dimensity chipset is the world’s first to be validated at LPDDR5T operating speeds up to 9.6Gbps, enabling upcoming devices to unleash an unprecedented level of mobile performance,”  said JC Hsu, Corporate Sr. Vice President and General Manager of Wireless Communications Business Unit at MediaTek. “Using this updated architecture, developers and users alike will be able to get more out of their devices than ever before.”

Sungsoo Ryu, head of DRAM Product Planning at SK hynix, said: “SK hynix’s partnership with MediaTek is set to play a key role in the LPDDR5T’s market entry. Starting with this performance verification, we will expand the scope of product supply to further strengthen the leadership of the mobile DRAM market.”

The post SK hynix’s LPDDR5T Verified as World’s Fastest Mobile DRAM Using MediaTek’s Next-Gen Mobile Platform first appeared on SK hynix Newsroom.

hynix Semiconductor, Inc. today announced the availability of DRAM industry’s first JEDEC standard 8GB DDR2 registered dual in-line memory modules (R-DIMMs) by utilizing hynix’s own multi-die stacking technology.

hynix has begun sampling the 8GB DDR2 R-DIMMs for high-end server applications. The new modules consist of 36 2Gb dual die package (DDP) devices and a total of 72 die by utilizing hynix’s own multi-die stacking technology. The hynix 2Gb DDP devices utilize two 1Gb DDR2 SDRAM die based on the company’s .10-micron process technology in one package. hynix’s new DDR2 R-DIMMs can fully meet the JEDEC standard of 30.35mm module width and 133.35 mm height, maximizing memory capacity to 8GB. Currently, other 8GB DDR2 R-DIMMs already available in the market place are extended-size Tall-DIMMs.

The development of the JEDEC standard 8GB DDR2 R-DIMM by hynix demonstrates the company’s leading technical expertise and strong competitiveness in the server market. hynix is expected to further enhance its keen focus on delivering high-quality, reliable solutions to customers by committing to research and development on higher-density and smaller-form memory modules.

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About hynix Semiconductor Inc.

hynix Semiconductor Inc. (HSI) of Icheon, Korea, is a leading supplier of semiconductor memory products such as Dynamic Random Access Memory chips (“DRAMs”), Static Random Access Memory chips (“SRAMs”) and Flash memory chips to a wide range of customers. The Company’s shares are traded on the Korea Stock Exchange, and the Global Depository shares are listed on the Luxemburg Stock Exchange. Further information about hynix is available at www.hynix.com.

The post hynix Introduces DRAM Industry’s First JEDEC Standard 8GB DDR2 R-DIMMs first appeared on SK hynix Newsroom.