SK hynix Inc. (or “the company”, www.skhynix.com) has developed its first DDR5 DRAM-based CXL (Compute Express Link) memory samples and strengthened its presence in next-generation memory solutions market. The form factor of the sample is EDSFF (Enterprise & Data Center Standard Form Factor) E3.S and it supports PCIe 5.0 x8 Lane, uses DDR5 standard DRAM and is equipped with CXL controllers.

CXL¹⁾, which is based on PCIe (Peripheral Component Interconnect Express)²⁾, is a new standardized interface that helps increase the efficiency of utilizing CPUs, GPUs, accelerators, and memory. SK hynix has participated in the CXL consortium from an early stage, and is looking to secure CXL memory market leadership.

¹⁾ CXL (Compute Express Link): Next-generation interface to utilize high performance computing system efficiently

²⁾ PCIe (Peripheral Component Interconnect Express): Serial-structured high-speed input/output interface used in the main boards of digital devices.

Expandable CXL Memory to Begin Mass Production in 2023

The essential point of the CXL memory market is expandability. The CXL memory allows for flexible memory expansion compared to current server market, where the memory capacity and performance are fixed once the server platform is adopted. CXL also has high growth potential as it is an interface spotlighted for high performance computing systems such as AI and big data related applications.

The first CXL memory device developed by SK hynix is a 96GB product composed of 24Gb DDR5 DRAMs based on 1anm, which is the latest tech node. The company expects high customer satisfaction of this product with flexible configuration of bandwidth and capacity expanded cost-efficiently.

“I see CXL as a new opportunity to expand memory and create a new market,” said Uksong Kang, Head of DRAM Product Planning explaining SK hynix’s CXL memory deployment strategy. “We aim to mass-produce CXL memory products by 2023, and will continue to develop cutting-edge DRAM technologies and advanced packaging technologies to launch various CXL-based bandwidth/capacity expandable memory solution products.”

Various Collaboration Plans to Expand the CXL Memory Ecosystem

“Dell has been at the forefront of developing the CXL and EDSFF ecosystems, driving technology standards through the CXL and SNIA consortiums, and working closely with our partners on CXL product requirements to meet future workload demands. The SK hynix EDSFF E3.S form factor CXL memory module is an example of the innovative products that customers will be able to deploy to meet their growing memory needs,” said Stuart Berke, Vice President and Fellow at Dell’s Infrastructure Solutions Group.

Dr. Debendra Das Sharma, Intel Senior Fellow and co-GM of Memory and I/O Technologies at Intel added, “CXL plays an essential role in extending memory for data center systems to evolve. We look forward to building and expanding the CXL memory ecosystem, as well as quickly developing technology standards through the CXL consortium, by collaborating with partners like SK hynix.”

“AMD is excited about the possibilities of workload performance acceleration with memory expansion using CXL technology. We look forward to collaborating with SK hynix on the development and validation of CXL as the industry shifts to a more dynamic and flexible memory infrastructure,” said Raghu Nambiar, Corporate Vice President of Data Center Ecosystems and Solutions at AMD.

“CXL is a key technology that will be critical in optimizing memory systems in the future, and we are actively working with SK hynix in CXL memory design and verification to promote the rapid development of the CXL memory ecosystem,” said Christopher Cox, Vice President of Technology at Montage Technologies.

Securing Technology Accessibility by Developing HMSDK dedicated to CXL Memory

SK hynix also developed the Heterogeneous Memory Software Development Kit (HMSDK)³⁾ exclusively for CXL memory devices. The kit will include features to improve system performance and monitor the systems while running various workloads. The company plans to distribute it as an open source in the fourth quarter of 2022. It is expected that end users such as software developers will be able to utilize SK hynix’s CXL memory more effectively.

³⁾ HMSDK (Heterogeneous Memory Software Development Kit): A software development kit that allows different grades of memory to be operated in one system

 The company prepared a separate sample for evaluation to help customers evaluate it with ease. As there is currently no server which supports EDSFF E3.S x8 Lane, SK hynix replaced the dedicated samples’ EDSFF pins with PCIe to support customers install the samples to existing PCIe slots.

SK hynix is planning to exhibit the product in upcoming events, beginning with Flash Memory Summit in early August, Intel Innovation at the end of September and Open Compute Project (OCP) Global Summit in October, while scheduling to demonstrate a demo with HMSDK as well. The company will actively deploy CXL memory related business to provide customers with the memory products they need in a timely manner.

The post SK hynix Develops DDR5 DRAM CXL^TM Memory to Expand the CXL Memory Ecosystem first appeared on SK hynix Newsroom.

As an industry leader, SK hynix works to propel the HBM3 market forward by initiating industry collaboration and partnerships and innovating solutions like its HBM2E and HBM3 products, released in 2019 and 2021, respectively.

Sungsoo Ryu, Head of SK hynix DRAM Product Planning, and Sunghak Lee, Technical Leader of SK hynix In-Package Memory (IPM) Product Planning, introduced how their teams are maintaining the company’s long-term strategy in their second EE Times column. The duo’s previous column explored how HBM3 is helping to meet higher demands on DRAM and memory.

Ryu’s DRAM Product Planning team aims to deliver a new HBM line-up once every two years whilst continuing internal and external efforts to increase HBM products’ speed, density, power, and area.

As the industry continues deliberating on optimal performance targets, reaching a consensus will be a crucial step toward activating SK hynix’s HBM roadmap. Meanwhile, the DRAM Product Planning team will continue working with partners to tackle existing technical issues and maintain its industry leadership position.

Read the full article on EE Times: SK hynix DRAM Product Planning Spearheads the Memory Evolution in the Post-HBM3 Era

The post SK hynix DRAM Product Planning Spearheads the Memory Evolution in the Post-HBM3 Era first appeared on SK hynix Newsroom.

Sungsoo Ryu and Sunghak Lee, Head of SK hynix DRAM Product Planning and Technical Leader of SK hynix IPM Planning respectively, explain how the technology was developed in a recent EE Times column.

HBM3 supports max 819GB per second bandwidth performance, giving it an approximately 78% higher bandwidth performance compared with HBM2E at 460GB per second.

SK hynix also plans to continue strengthening relationships with key industry players, including SoC (system-on-chip), ASIC (application-specific integrated circuit), OSAT (outsourced assembly and test), and PHY/IP partners.

The company said that it would also supply HBM3 to NVIDIA starting in the third quarter of this year.

You can read the article in its entirety on EE Times here: SK hynix DRAM Product Planning at the Forefront of the HBM3 DRAM Revolution

The post SK hynix Driving the HBM3 DRAM Revolution first appeared on SK hynix Newsroom.