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		<title>SK hynix Develops ‘PS1012 U.2’, High Capacity SSD for AI Data Centers</title>
		<link>https://skhynix-news-global-stg.mock.pe.kr/sk-hynix-develops-ps1012-u-2-high-capacity-ssd-for-ai-data-centers/</link>
		
		<dc:creator><![CDATA[user]]></dc:creator>
		<pubDate>Wed, 18 Dec 2024 00:00:29 +0000</pubDate>
				<category><![CDATA[featured]]></category>
		<category><![CDATA[Press Release]]></category>
		<category><![CDATA[PS1012]]></category>
		<category><![CDATA[PCIe Gen5]]></category>
		<category><![CDATA[Solidigm]]></category>
		<category><![CDATA[data center]]></category>
		<category><![CDATA[AI]]></category>
		<category><![CDATA[SSD]]></category>
		<category><![CDATA[QLC]]></category>
		<guid isPermaLink="false">https://skhynix-news-global-stg.mock.pe.kr/?p=16952</guid>

					<description><![CDATA[<p>News Highlights Development of 61TB product based on QLC technology, strengthening synergy with Solidigm in the AI data center SSD market Data transfer speed of up to 32GT/s with PCIe 5.0, with doubled sequential read performance compared to PCIe 4.0 products SK hynix to build a foundation for growth to become a full-stack AI memory [&#8230;]</p>
<p>The post <a href="https://skhynix-news-global-stg.mock.pe.kr/sk-hynix-develops-ps1012-u-2-high-capacity-ssd-for-ai-data-centers/">SK hynix Develops ‘PS1012 U.2’, High Capacity SSD for AI Data Centers</a> first appeared on <a href="https://skhynix-news-global-stg.mock.pe.kr">SK hynix Newsroom</a>.</p>]]></description>
										<content:encoded><![CDATA[<h3 class="tit" style="text-align: left;">News Highlights</h3>
<ul style="color: #000; font-size: 18px; padding-left: 20px;">
<li>Development of 61TB product based on QLC technology, strengthening synergy with Solidigm in the AI data center SSD market</li>
<li>Data transfer speed of up to 32GT/s with PCIe 5.0, with doubled sequential read performance compared to PCIe 4.0 products</li>
<li>SK hynix to build a foundation for growth to become a full-stack AI memory provider with leadership in high-capacity eSSD technology</li>
</ul>
<h3 class="tit">Seoul, December 18, 2024</h3>
<p>SK hynix Inc. (or “the company”, <span style="text-decoration: underline;"><a href="https://www.skhynix.com/eng/main.do" target="_blank" rel="noopener noreferrer">www.skhynix.com</a></span>) announced today that it has completed development of its high-capacity SSD product, ‘PS1012 U.2<sup>1</sup>’, designed for AI data centers.</p>
<p style="font-size: 14px; font-style: italic; color: #555;"><sup>1</sup><strong>U.2</strong>: A type of Form Factor for SSDs, typically 2.5 inches in size, primarily used in servers or high-performance workstations. It is known for large capacity storage and high durability.</p>
<p><img loading="lazy" decoding="async" class="size-full wp-image-16524 aligncenter" src="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2025/02/10145107/SK-hynix_PS1012-U.2_01.jpg" alt="" width="1000" height="749" /></p>
<p>As the era of AI accelerates, the demand for high-performance enterprise SSDs (eSSD) is rapidly increasing, and QLC<sup>2</sup> technology, which enables high capacity, has become the industry standard. In line with this trend, SK hynix has developed a 61TB product using this technology and introduced it to the market.</p>
<p style="font-size: 14px; font-style: italic; color: #555;"><sup>2</sup><strong>QLC</strong>: NAND flash is divided into SLC (Single Level Cell), MLC (Multi Level Cell), TLC (Triple Level Cell), QLC (Quadruple Level Cell), and PLC (Penta Level Cell) depending on how much information is stored in one cell. As the amount of information stored increases, more data can be stored in the same area.</p>
<p>SK hynix has been leading the SSD market for AI data centers with Solidigm, a subsidiary which commercialized QLC-based eSSD for the first time in the world. With the development of PS1012, the company expects to build a balanced SSD portfolio, thereby maximizing synergy between the two companies.</p>
<p>With the latest 5th generation (Gen5) PCIe<sup>3</sup>, PS1012 doubles its bandwidth compared to 4th generation based products. As a result, the data transfer speed reaches 32GT/s (Giga-transfers per second)<sup>4</sup>, with the sequential read performance of 13GB/s (Gigabyte per second), which is twice that of previous generation products.</p>
<p style="font-size: 14px; font-style: italic; color: #555;"><sup>3</sup><strong>Peripheral Component Interconnect express (PCIe)</strong>: A high-speed input/output interface with a serial structure used on the main board of a digital device.<br />
<sup>4</sup><strong>Giga-transfers per second (GT/s)</strong>: Number of operations or information transferred per second</p>
<p>In addition, the company developed this product to support the OCP 2.0 version, enhancing its compatibility with various data center server devices of global AI customers.</p>
<p style="font-size: 14px; font-style: italic; color: #555;"><sup>5</sup><strong>Open Compute Project (OCP)</strong>: An international consultative body that involves major data center companies around the world to discuss hardware, software and eSSD standards for building ultra-high-efficiency data centers.</p>
<p>SK hynix plans to supply the sample of the new product to global server manufacturers within this year for product evaluation, and based on this, it plans to expand its product line to 122TB in the third quarter of next year. The company also aims to lead the SSD market for ultra-high capacity data centers by developing 244TB products based on the world’s highest 321-high 4D NAND developed in November, to overcome the capacity limitations of eSSD.</p>
<p>&#8220;SK hynix and Solidigm are strengthening our QLC-based high-capacity SSD lineup to solidify our technological leadership in NAND solutions for AI,&#8221; said Ahn Hyun, President and Chief Development Officer of SK hynix. &#8220;In the future, we will lay the foundation for growth to become a Full Stack AI memory provider by meeting the diverse needs of AI data center customers based on our high competitiveness in the eSSD field.&#8221;</p>
<p><img loading="lazy" decoding="async" class="size-full wp-image-16525 aligncenter" src="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2025/02/10145057/SK-hynix_PS1012-U.2_02.jpg" alt="" width="1000" height="667" /></p>
<h3 class="tit">About SK hynix Inc.</h3>
<p>SK hynix Inc., headquartered in Korea, is the world’s top tier semiconductor supplier offering Dynamic Random Access Memory chips (“DRAM”), flash memory chips (&#8220;NAND flash&#8221;) and CMOS Image Sensors (&#8220;CIS&#8221;) for a wide range of distinguished customers globally. The Company’s shares are traded on the Korea Exchange, and the Global Depository shares are listed on the Luxembourg Stock Exchange. Further information about SK hynix is available at <span style="text-decoration: underline;"><a href="https://urldefense.com/v3/__https:/www.skhynix.com/eng/main.do__;!!N96JrnIq8IfO5w!gXFbF1sRVRWAEDJ3PaZ-I4YA0xhBRWyPvGQbcrGYpNvHRRWenoc8P0VxyvcqxTMjl4dfFcFDkTnoPXz6hDU$" target="_blank" rel="noopener noreferrer">www.skhynix.com</a></span>, <span style="text-decoration: underline;"><a href="https://urldefense.com/v3/__https:/news.skhynix.com/__;!!N96JrnIq8IfO5w!gXFbF1sRVRWAEDJ3PaZ-I4YA0xhBRWyPvGQbcrGYpNvHRRWenoc8P0VxyvcqxTMjl4dfFcFDkTnozIJInBk$" target="_blank" rel="noopener noreferrer">news.skhynix.com</a></span>.</p>
<h3 class="tit">Media Contact</h3>
<p>SK hynix Inc.<br />
Global Public Relations</p>
<p>Technical Leader<br />
Sooyeon Lee<br />
E-Mail: <span style="text-decoration: underline;"><a href="mailto:global_newsroom@skhynix.com">global_newsroom@skhynix.com</a></span></p>
<p>Technical Leader<br />
Kanga Kong<br />
E-Mail: <span style="text-decoration: underline;"><a href="mailto:global_newsroom@skhynix.com">global_newsroom@skhynix.com</a></span></p>
<p>&nbsp;</p>
<p><a href="https://linkedin.com/showcase/skhynix-news-and-stories/" target="_blank" rel="noopener noreferrer"><img loading="lazy" decoding="async" class="size-full wp-image-15776 aligncenter" src="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2025/02/10074354/SK-hynix_Newsroom-banner_1.png" alt="" width="800" height="135" srcset="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/09/13015412/SK-hynix_Newsroom-banner_1.png 1000w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/09/13015412/SK-hynix_Newsroom-banner_1-680x115.png 680w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/09/13015412/SK-hynix_Newsroom-banner_1-768x130.png 768w" sizes="(max-width: 800px) 100vw, 800px" /></a></p><p>The post <a href="https://skhynix-news-global-stg.mock.pe.kr/sk-hynix-develops-ps1012-u-2-high-capacity-ssd-for-ai-data-centers/">SK hynix Develops ‘PS1012 U.2’, High Capacity SSD for AI Data Centers</a> first appeared on <a href="https://skhynix-news-global-stg.mock.pe.kr">SK hynix Newsroom</a>.</p>]]></content:encoded>
					
		
		
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		<item>
		<title>3D Fe-NAND to Surpass 3D CTN Memory Following Cell Stacking Breakthrough</title>
		<link>https://skhynix-news-global-stg.mock.pe.kr/3d-fe-nand-to-surpass-3d-ctn-memory/</link>
		
		<dc:creator><![CDATA[user]]></dc:creator>
		<pubDate>Tue, 31 Oct 2023 00:00:32 +0000</pubDate>
				<category><![CDATA[featured]]></category>
		<category><![CDATA[Opinion]]></category>
		<category><![CDATA[3D CTN Memory]]></category>
		<category><![CDATA[3D Fe-NAND]]></category>
		<category><![CDATA[Revolutionary Technology Center]]></category>
		<category><![CDATA[RTC]]></category>
		<category><![CDATA[QLC]]></category>
		<guid isPermaLink="false">http://admin.news.skhynix.com/?p=13173</guid>

					<description><![CDATA[<p>Conventional 3D NAND memory stores data by trapping charges in the silicon nitride film known as a charge trade nitride (CTN) layer. Despite its widespread use, 3D CTN NAND faces limitations in achieving memory expansion through cell stacking due to cell-to-cell interference and spacer oxide thickness between vertically adjacent cells. This has prompted the industry to [&#8230;]</p>
<p>The post <a href="https://skhynix-news-global-stg.mock.pe.kr/3d-fe-nand-to-surpass-3d-ctn-memory/">3D Fe-NAND to Surpass 3D CTN Memory Following Cell Stacking Breakthrough</a> first appeared on <a href="https://skhynix-news-global-stg.mock.pe.kr">SK hynix Newsroom</a>.</p>]]></description>
										<content:encoded><![CDATA[<p>Conventional 3D NAND memory stores data by trapping charges in the silicon nitride film known as a charge trade nitride (CTN) layer. Despite its widespread use, 3D CTN NAND faces limitations in achieving memory expansion through cell stacking due to cell-to-cell interference and spacer oxide thickness between vertically adjacent cells. This has prompted the industry to search for alternatives to 3D CTN NAND technology that overcome these limitations, with 3D ferroelectric<sup>1</sup> NAND (Fe-NAND) emerging as a potential successor.</p>
<p>In 2022, researchers at SK hynix’s Revolutionary Technology Center (RTC) revealed they had <a href="https://research.skhynix.com/blog/detail?seq=169" target="_blank" rel="noopener noreferrer"><span style="text-decoration: underline;">demonstrated 3D Fe-NAND triple-level-cell<sup>2</sup> (TLC) operation</span></a> using the ferroelectric HfO<sub>2</sub><sup>3</sup>. This article will focus on the RTC’s latest research presented at the 2023 Very Large-Scale Integration (VLSI) Symposium, which showed 3D Fe-NAND quad-level cell<sup>4</sup> (QLC) operation for the first time using the 3D CTN NAND test vehicle<sup>5</sup>.</p>
<p style="font-size: 14px; font-style: italic; color: #555;"><sup>1</sup><strong>Ferroelectric (FE)</strong>: A material which exhibits spontaneous electric polarization without an external electrical field that can be reversed in direction by the application of an appropriate electric field.<br />
<sup>2</sup><strong>Triple-level cell (TLC)</strong>: A form of NAND flash memory that can store up to 3 bits of data per memory cell.<br />
<sup>3</sup><strong>Hafnium Oxide (HfO<sub>2</sub>)</strong>: A mature high-k dielectric applied to semiconductor materials due to its high dielectric constant, thermodynamic stability, and the simplicity with which it can be deposited.<br />
<sup>4</sup><strong>Quad-level cell (QLC)</strong>: A form of NAND flash memory that can store up to 4 bits of data per memory cell.<br />
<sup>5</sup><strong>Test vehicle</strong>: A circuit or IC designed for the purpose of evaluating one or many device characteristics.</p>
<h3 class="tit">Finding the Ideal Cell Structure to Increase the PE Window</h3>
<p>For 3D Fe-NAND to realize TLC and QLC operation, it required further expansion of the program/erase (PE) window<sup>6</sup>. The latest RTC research proposed novel 3D Fe-NAND cell structures that can enlarge the PE window up to 10.54 V through cell stack optimization, thereby demonstrating the feasibility of QLC operation.</p>
<p style="font-size: 14px; font-style: italic; color: #555;"><sup>6</sup><strong>Program/erase window (PE window)</strong>: The process window of erasing and writing a cell. The more P/E cycles that the NAND technology can sustain, the better the endurance of the device.</p>
<p style="text-align: center;"><img loading="lazy" decoding="async" class="aligncenter wp-image-13217 size-full" title="Table showing key characteristics of four cell stack structures (S1–S4)" src="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/10/19093504/Sk-hynix_3D-QLC-Fe-NAND_011.png" alt="Table showing key characteristics of four cell stack structures (S1–S4)" width="1000" height="640" srcset="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/10/19093504/Sk-hynix_3D-QLC-Fe-NAND_011.png 1000w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/10/19093504/Sk-hynix_3D-QLC-Fe-NAND_011-625x400.png 625w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/10/19093504/Sk-hynix_3D-QLC-Fe-NAND_011-768x492.png 768w" sizes="(max-width: 1000px) 100vw, 1000px" /></p>
<p style="text-align: center;">Figure 1. Table showing key characteristics of four cell stack structures (S1–S4)</p>
<p>&nbsp;</p>
<p style="text-align: center;"><img loading="lazy" decoding="async" class="aligncenter wp-image-13346 size-full" title="Graphs comparing the (a) erase and (b) program performances of S1–S4" src="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/10/27060123/Sk-hynix_3D-QLC-Fe-NAND_021.png" alt="Graphs comparing the (a) erase and (b) program performances of S1–S4" width="1000" height="556" srcset="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/10/27060123/Sk-hynix_3D-QLC-Fe-NAND_021.png 1000w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/10/27060123/Sk-hynix_3D-QLC-Fe-NAND_021-680x378.png 680w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/10/27060123/Sk-hynix_3D-QLC-Fe-NAND_021-768x427.png 768w" sizes="(max-width: 1000px) 100vw, 1000px" /></p>
<p style="text-align: center;">Figure 2. Graphs comparing the (a) erase and (b) program performances of S1–S4</p>
<p>&nbsp;</p>
<p>Figure 1 summarizes the four types of cell structures (S1–S4) evaluated in this study and compares the electrical characteristics including the standard PE window, the post 3k cycle PE window, and the channel to gate leakage current. Figure 2(a) and (b) show the transfer characteristics of the four cell structures as the researchers erased and programmed the cells using the conventional ISPE<sup>7</sup> and ISPP<sup>8</sup> methods. In particular, S4 achieved the enlarged P/E window of 10.54 V by reducing the leakage current and optimizing the cell structures of the ferroelectric stack and the top interlayer.</p>
<p style="font-size: 14px; font-style: italic; color: #555;"><sup>7</sup><strong>Incremental Step Pulse Erase (ISPE)</strong>: A memory programming method in which a memory element is programmed to a specific state or set to an erase state using small, incremental voltage steps or pulses.<br />
<sup>8</sup><strong>Incremental Step Pulse Programming (ISPP)</strong>: A memory programming method in which a series of programming pulses of increasing magnitude are applied to select memory cells to gradually raise their threshold voltage.</p>
<p><img loading="lazy" decoding="async" class="aligncenter wp-image-13347 size-full" title="Line graphs for S4 showing its (a) TLC threshold voltage (Vth) distribution (b) QLC Vth distribution and (c) post 3k cycle Vth distribution" src="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/10/27060128/Sk-hynix_3D-QLC-Fe-NAND_031.png" alt="Line graphs for S4 showing its (a) TLC threshold voltage (Vth) distribution (b) QLC Vth distribution and (c) post 3k cycle Vth distribution" width="1000" height="540" srcset="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/10/27060128/Sk-hynix_3D-QLC-Fe-NAND_031.png 1000w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/10/27060128/Sk-hynix_3D-QLC-Fe-NAND_031-680x367.png 680w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/10/27060128/Sk-hynix_3D-QLC-Fe-NAND_031-768x415.png 768w" sizes="(max-width: 1000px) 100vw, 1000px" /></p>
<p class="source" style="text-align: center;">Figure 3. Line graphs for S4 showing its (a) TLC threshold voltage (V<sub>th</sub>) distribution (b) QLC V<sub>th </sub>distribution and (c) post 3k cycle V<sub>th</sub> distribution</p>
<p>&nbsp;</p>
<p>Both TLC and QLC operations were performed on S4. Figure 3(a) shows TLC verification results for S4 with the minimum gap margin of 0.45 V between two adjacent threshold voltage (V<sub>th</sub>) states. This represents a significant improvement from the RTC’s previous data, which showed a minimum gap margin of 0.11 V. Moreover, with the expanded PE window, Figure 3(b) shows S4’s QLC operation is demonstrated with the minimum gap margin of 0.24 V. In Figure 3(c), QLC Vth distribution after 3k cycling stress is shown with the reduced minimum gap margin of 0.14V. The QLC operation after the 3k cycle is verified not only by expanding the PE window, but also by improving endurance properties as a result of cell stack engineering.</p>
<h3 class="tit">3D Fe-NAND Opens the Door to a New Era</h3>
<p>To overcome the limitations of conventional 3D CTN NAND, the researchers successfully fabricated the HfO<sub>2</sub>-based 3D Fe-NAND. The new NAND research shows that optimizing the cell stack leads to an expansion of the PE window, while the QLC operation was also demonstrated which suggests that 3D Fe-NAND is a promising potential solution in the post-3D NAND era.</p>
<p>&nbsp;</p>
<p><em>For more information regarding RTC’s research, please visit the center’s </em><em>research website (</em><span style="text-decoration: underline;"><a href="https://research.skhynix.com" target="_blank" rel="noopener noreferrer"><em>https://research.skhynix.com</em></a></span><em>). The RTC operates the site to</em><em> share insights on its ongoing research of future technologies and to actively communicate with various global research organizations.</em></p>
<p><img loading="lazy" decoding="async" class="size-full wp-image-13205 aligncenter" src="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/10/19084335/Sk-hynix_3D-QLC-Fe-NAND_profile-banner1.png" alt="" width="1000" height="170" srcset="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/10/19084335/Sk-hynix_3D-QLC-Fe-NAND_profile-banner1.png 1000w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/10/19084335/Sk-hynix_3D-QLC-Fe-NAND_profile-banner1-680x116.png 680w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/10/19084335/Sk-hynix_3D-QLC-Fe-NAND_profile-banner1-768x131.png 768w" sizes="(max-width: 1000px) 100vw, 1000px" /></p><p>The post <a href="https://skhynix-news-global-stg.mock.pe.kr/3d-fe-nand-to-surpass-3d-ctn-memory/">3D Fe-NAND to Surpass 3D CTN Memory Following Cell Stacking Breakthrough</a> first appeared on <a href="https://skhynix-news-global-stg.mock.pe.kr">SK hynix Newsroom</a>.</p>]]></content:encoded>
					
		
		
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		<title>SK hynix Ships Samples of High-Performance 96-Layer 1Tb QLC 4D NAND</title>
		<link>https://skhynix-news-global-stg.mock.pe.kr/sk-hynix-ships-samples-of-high-performance-96-layer-1tb-qlc-4d-nand-2/</link>
		
		<dc:creator><![CDATA[user]]></dc:creator>
		<pubDate>Thu, 09 May 2019 11:26:07 +0000</pubDate>
				<category><![CDATA[Press Release]]></category>
		<category><![CDATA[1Tb]]></category>
		<category><![CDATA[96-Layer]]></category>
		<category><![CDATA[NAND]]></category>
		<category><![CDATA[4D]]></category>
		<category><![CDATA[QLC]]></category>
		<guid isPermaLink="false">http://admin.news.skhynix.coint.site/?p=794</guid>

					<description><![CDATA[<p>Seoul, May 9, 2019 SK hynix Inc. (or ‘the Company’, www.skhynix.com) announced today that it has delivered samples of new 1Tb (Terabit) QLC (Quadruple Level Cell) product to major SSD (Solid State Drive) Controller companies. Image Download Seoul, May 9, 2019 SK hynix Inc. (or ‘the Company’, www.skhynix.com) announced today that it has delivered samples [&#8230;]</p>
<p>The post <a href="https://skhynix-news-global-stg.mock.pe.kr/sk-hynix-ships-samples-of-high-performance-96-layer-1tb-qlc-4d-nand-2/">SK hynix Ships Samples of High-Performance 96-Layer 1Tb QLC 4D NAND</a> first appeared on <a href="https://skhynix-news-global-stg.mock.pe.kr">SK hynix Newsroom</a>.</p>]]></description>
										<content:encoded><![CDATA[<p><!-- 콘텐츠 시작부분이 본문텍스트가 아닐경우 원하는 텍스트 노출 --></p>
<div style="display: none;">Seoul, May 9, 2019 SK hynix Inc. (or ‘the Company’, www.skhynix.com) announced today that it has delivered samples of new 1Tb (Terabit) QLC (Quadruple Level Cell) product to major SSD (Solid State Drive) Controller companies. </div>
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<h3 class="tit">Seoul, May 9, 2019</h3>
<p>SK hynix Inc. (or ‘the Company’, <a class="-as-ga" href="http://www.skhynix.com" target="_blank" rel="noopener noreferrer" data-ga-category="sk-hynix-newsroom" data-ga-action="click" data-ga-label="goto_http://www.skhynix.com">www.skhynix.com</a>) announced today that it has delivered samples of new 1Tb (Terabit) QLC (Quadruple Level Cell) product to major SSD (Solid State Drive) Controller companies. The Company applied its own QLC technology to its world’s first 96-Layer “CTF (Charge Trap Flash) based 4D (Four-Dimensional) NAND Flash (or 4D NAND).” SK hynix intends to expand its NAND portfolio to 96-layer-based 1Tb QLC products in time for the QLC market opening and strengthen its responsiveness to the next-generation high-density memory market.</p>
<p>QLC stores four bits of data in one NAND cell, allowing higher density compared to TLC (Triple Level Cell) that stores three bits per cell. Using QLC, it is possible to develop high-density products with cost competitiveness.</p>
<p>SK hynix is ​​able to secure the industry’s top-level cost competitiveness through this product, which has reduced the area to less than 90% of the existing 3D-based QLC products.</p>
<p>Using small-sized planes, an advantage of the Company’s 4D NAND, SK hynix also adopted a four-Plane architecture. It increases the number of planes in a single chip from two to four, doubling data bandwidth from 32KB (kilobytes) to 64KB. With this high-performance product that can process up to 64KB of data simultaneously, SK hynix secured both cost and performance competitiveness.</p>
<p>SK hynix said that it has recently sent samples to companies that develop and sell SSD controller and NAND storage device to confirm the product’s performance. “We got QLC engineering samples from SK hynix, and were impressed by its overall performance. The samples meet client SSD product requirements,” said Wallace Kou, Chief Executive Officer of Silicon Motion in Taiwan, a global leader in the field.</p>
<p>Meanwhile, SK hynix is ​​developing its own QLC software algorithm and controller at the same time, and plans to launch solution products in time to meet client demand.</p>
<p>“We plan to launch our own QLC-based SSD from next year when demand for enterprise QLC NAND is expected to become meaningful,” said Vice President Han Joo Na, Head of NAND Development Strategy Office. “In particular, we intend to establish a solid position in the market for high-density eSSD, which is replacing hard disk drives (HDD), with NAND Flash solutions as large as 16TB (terabytes) or larger.”</p>
<p>According to IDC, a market research institute, the proportion of QLC in the NAND Flash market is expected to increase from 3% in 2019 to 22% in 2023. It also forecasts that the eSSD market will grow at an annual average growth rate (CAGR) of 47.9% (unit: GB), rapidly replacing HDD.</p>
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<h3 class="tit">Media Contact</h3>
<p>SK hynix Inc.<br />
Global Public Relations</p>
<p>Technical Leader (Assistant Manager)<br />
Hyun Kyung Olivia Lee<br />
Phone: +82.31.8093.4771<br />
E-Mail: <a class="email_link -as-ga" href="mailto:hyunkyung14.lee@sk.com" data-ga-category="sk-hynix-newsroom" data-ga-action="email" data-ga-label="email_mailto:hyunkyung14.lee@sk.com">hyunkyung14.lee@sk.com</a></p>
<p>Technical Leader (Senior Manager)<br />
Eun Suk Yixi Lee<br />
Phone: +82.31.8093.4790<br />
E-Mail: <a class="email_link -as-ga" href="mailto:eunsuk8.lee@sk.com" data-ga-category="sk-hynix-newsroom" data-ga-action="email" data-ga-label="email_mailto:eunsuk8.lee@sk.com">eunsuk8.lee@sk.com</a></p><p>The post <a href="https://skhynix-news-global-stg.mock.pe.kr/sk-hynix-ships-samples-of-high-performance-96-layer-1tb-qlc-4d-nand-2/">SK hynix Ships Samples of High-Performance 96-Layer 1Tb QLC 4D NAND</a> first appeared on <a href="https://skhynix-news-global-stg.mock.pe.kr">SK hynix Newsroom</a>.</p>]]></content:encoded>
					
		
		
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