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	<title>server DRAM - SK hynix Newsroom</title>
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		<title>[Rulebreakers’ Revolutions] How SK hynix’s Server DRAM Validation Process Succeeds in a Diverse Server CPU Market</title>
		<link>https://skhynix-news-global-stg.mock.pe.kr/rulebreakers-revolutions-ddr5-validation-in-diverse-market/</link>
		
		<dc:creator><![CDATA[user]]></dc:creator>
		<pubDate>Thu, 31 Oct 2024 06:00:47 +0000</pubDate>
				<category><![CDATA[featured]]></category>
		<category><![CDATA[Technology]]></category>
		<category><![CDATA[validation]]></category>
		<category><![CDATA[CPU]]></category>
		<category><![CDATA[server DRAM]]></category>
		<category><![CDATA[Rulebreakers' Revolutions]]></category>
		<category><![CDATA[1c DDR5]]></category>
		<guid isPermaLink="false">http://admin.news.skhynix.com/?p=16091</guid>

					<description><![CDATA[<p>Challenging convention, defying limits, and aiming for the skies, rulebreakers remake the rules in their quest to come up with groundbreaking solutions to problems. Following on from SK hynix’s “Who Are the Rulebreakers?” brand film, this series showcases the company’s various “rulebreaking” innovations that have reshaped technology and redefined new industry standards. This fourth episode [&#8230;]</p>
<p>The post <a href="https://skhynix-news-global-stg.mock.pe.kr/rulebreakers-revolutions-ddr5-validation-in-diverse-market/">[Rulebreakers’ Revolutions] How SK hynix’s Server DRAM Validation Process Succeeds in a Diverse Server CPU Market</a> first appeared on <a href="https://skhynix-news-global-stg.mock.pe.kr">SK hynix Newsroom</a>.</p>]]></description>
										<content:encoded><![CDATA[<p><img loading="lazy" decoding="async" class="size-full wp-image-15409 aligncenter" src="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/07/23054753/SK-hynix_Rulebreaker_1_MR-MUF_KV-banner_01.png" alt="" width="1000" height="348" srcset="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/07/23054753/SK-hynix_Rulebreaker_1_MR-MUF_KV-banner_01.png 1000w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/07/23054753/SK-hynix_Rulebreaker_1_MR-MUF_KV-banner_01-680x237.png 680w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/07/23054753/SK-hynix_Rulebreaker_1_MR-MUF_KV-banner_01-768x267.png 768w" sizes="(max-width: 1000px) 100vw, 1000px" /></p>
<div style="border: none; background: #D9D9D9; height: auto; padding: 10px 20px; margin-bottom: 10px; color: #000;"><span style="color: #000000; font-size: 18px;">Challenging convention, defying limits, and aiming for the skies, rulebreakers remake the rules in their quest to come up with groundbreaking solutions to problems. Following on from SK hynix’s “<a href="https://news.skhynix.com/who-are-the-rulebreakers/" target="_blank" rel="noopener noreferrer"><span style="text-decoration: underline;">Who Are the Rulebreakers?</span></a>” brand film, this series showcases the company’s various “rulebreaking” innovations that have reshaped technology and redefined new industry standards. This fourth episode covers the vital role validation has played in the advancement of the company’s DDR5 DRAM lineup.</span></div>
<p>&nbsp;</p>
<p>SK hynix broke new technological ground to achieve the recent landmark development of <a href="https://news.skhynix.com/sk-hynix-develops-industry-first-1c-ddr5/" target="_blank" rel="noopener noreferrer"><span style="text-decoration: underline;">the world’s first DDR5<sup>1</sup> product built using the 1c<sup>2</sup> node</span></a>. Boasting improved operating speed and power efficiency compared to the previous generation, the 16 gigabit (Gb) 1c DDR5 represents a monumental leap forward in DRAM process technology.</p>
<p style="font-size: 14px; font-style: italic; color: #555;"><sup>1</sup><strong>Double Data Rate 5 (DDR5)</strong>: A server DRAM that effectively handles the increasing demands of larger and more complex data workloads by offering enhanced bandwidth and power efficiency compared to the previous generation, DDR4.<br />
<sup>2</sup><strong>1c</strong>: The sixth generation of the 10 nm DRAM process technology, which was developed in the order of 1x-1y-1z-1a-1b-1c.</p>
<p>The groundbreaking achievement is just the latest in a long line of breakthroughs by the company to advance its DDR5 lineup. This remarkable progress is not only a testament to SK hynix’s technological prowess but also to its innovative approach to the validation process.</p>
<p>This episode of <a href="https://news.skhynix.com/tag/rulebreakers-revolutions/" target="_blank" rel="noopener noreferrer"><span style="text-decoration: underline;">Rulebreakers’ Revolutions</span></a> will focus on how the company’s differentiated validation strategy is enabling it to navigate the challenges posed by a diversifying server CPU market, contributing to SK hynix’s DRAM leadership including its cutting-edge DDR5 server DRAM.</p>
<p><img loading="lazy" decoding="async" class="aligncenter wp-image-16097 size-full" title="[Rulebreakers’ Revolutions] How SK hynix’s Server DRAM Validation Process Succeeds in a Diverse Server CPU Market" src="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/10/23083628/SK-hynix_Rulebreaker_4_DDR5_01.png" alt="[Rulebreakers’ Revolutions] How SK hynix’s Server DRAM Validation Process Succeeds in a Diverse Server CPU Market" width="1000" height="588" srcset="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/10/23083628/SK-hynix_Rulebreaker_4_DDR5_01.png 1000w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/10/23083628/SK-hynix_Rulebreaker_4_DDR5_01-680x400.png 680w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/10/23083628/SK-hynix_Rulebreaker_4_DDR5_01-768x452.png 768w" sizes="(max-width: 1000px) 100vw, 1000px" /></p>
<h3 class="tit">The Mission: Strengthening Validation in an Increasingly Diverse CPU Market</h3>
<p>SK hynix has faced various challenges throughout the successful development of its latest 1bnm and 1cnm DDR5 products. As each generation of DDR5 is based on a new DRAM process technology, a rigorous validation process is required to ensure the products’ performance and reliability as well as their compatibility with customer systems. This means that the company has had to continually adapt and strengthen its approach to validation for next-generation technologies.</p>
<p>In addition to validating new technologies, SK hynix also had to respond to the growing diversity of server CPU suppliers in the market. Traditionally, Intel has dominated the sector which has resulted in semiconductor companies primarily focusing their efforts on validating their products with the U.S. tech giant. However, while Intel still leads the sector, AMD and Arm-based suppliers are gradually increasing their market share, especially in cloud and specialized workloads, creating a more fragmented server CPU landscape.</p>
<p>Amid these shifting market dynamics, SK hynix is required to ensure its DDR5 products’ compatibility and reliability across a broader range of server CPU architectures. This is because CPU companies integrate their chips into a wide range of hardware, placing greater pressure to ensure compatibility with various server CPU types, which is essential for DDR5’s widespread adoption. In particular, early alignment with customers during the product planning stage is increasingly important to meet the needs of various companies and handle numerous server CPU types.</p>
<p>Faced with the challenge of validating new technologies in a diversifying server CPU market, SK hynix is consistently refining its validation methods to ultimately solidify its leadership in the server DRAM field.</p>
<p><img loading="lazy" decoding="async" class="aligncenter wp-image-16098 size-full" title="SK hynix employs a differentiated validation approach to ensure DDR5’s comparability with various server CPUs" src="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/10/23083633/SK-hynix_Rulebreaker_4_DDR5_02.png" alt="SK hynix employs a differentiated validation approach to ensure DDR5’s comparability with various server CPUs" width="1000" height="750" srcset="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/10/23083633/SK-hynix_Rulebreaker_4_DDR5_02.png 1000w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/10/23083633/SK-hynix_Rulebreaker_4_DDR5_02-533x400.png 533w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/10/23083633/SK-hynix_Rulebreaker_4_DDR5_02-768x576.png 768w" sizes="(max-width: 1000px) 100vw, 1000px" /></p>
<p class="source" style="text-align: center;">SK hynix employs a differentiated validation approach to ensure DDR5’s comparability with various server CPUs</p>
<p><strong> </strong></p>
<h3 class="tit">Compatibility, Collaboration, &amp; Customized Testing: Three Cs Key to Optimized Validation</h3>
<p>Although SK hynix had an established validation procedure for its products, the company has adjusted its process for the latest DDR5 products. Typically, validation begins in the pre-development stage by verifying that the design meets the specifications required by server customers and adheres to JEDEC<sup>3</sup> standards. The company then prepares memory validation samples in collaboration with external partners and aligns the test environment with SoC<sup>4</sup> companies, which play a key role in validation. While CPU companies are the customers for DDR5, SoC companies provide reputable third-party validation to verify the product’s readiness for real-world system application. Continuing with the validation process, the next stage involves internal testing to identify and resolve any defects. The samples are then sent to SoC companies for further tests to complete the process.</p>
<p style="font-size: 14px; font-style: italic; color: #555;"><sup>3</sup><strong>JEDEC Solid State Technology Association</strong>: With over 350 member companies, JEDEC is the global leader in developing open standards for the microelectronics industry.<br />
<sup>4</sup><strong>System-on-chip (Soc)</strong>: An integrated circuit that combines all the components of an electronic device onto a single chip.</p>
<p>For its recent DDR5 products, however, the company is taking a rulebreaking approach to validation that sets it apart from the rest of the field. This unique method is highlighted in the ongoing validation process for the 1bnm and 1cnm DDR5, which features several differentiated strategies.</p>
<p>For example, to ensure compatibility with a wide range of server CPUs, SK hynix is conducting validation on a wide range of systems—even those that have yet to be released. This involves close collaboration with SoC companies to discuss required technologies and perform co-validation, ensuring that potential issues with samples are addressed early in the development process.</p>
<p>As well as working with external SoC companies, SK hynix is also conducting improved internal collaboration throughout the validation process to enhance the completeness of the 1c DDR5. Departments responsible for process, design, and testing are closely working together to ensure the cost efficiency of test infrastructure and optimize the sample management and testing process. Moreover, the departments are identifying and improving potential defects in advance through rigorous simulation and aging tests, thereby securing the product’s reliability and stability.</p>
<p>Another key step in the validation process involves the development of customer-specific tests based on tailored validation scenarios. Recognizing that each customer has different requirements and various products, SK hynix evaluates and verifies various scenarios at the scale and volume testing stages. By predicting potential defects under actual usage conditions, the company aims to ensure that the 1c DDR5 performs reliably across a wide range of applications and platforms.</p>
<p><img loading="lazy" decoding="async" class="aligncenter wp-image-16099 size-full" title="SK hynix’s validation strategy involves ensuring broad compatibility, internal collaboration, and customized testing" src="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/10/23083638/SK-hynix_Rulebreaker_4_DDR5_03.png" alt="SK hynix’s validation strategy involves ensuring broad compatibility, internal collaboration, and customized testing" width="1000" height="771" srcset="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/10/23083638/SK-hynix_Rulebreaker_4_DDR5_03.png 1000w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/10/23083638/SK-hynix_Rulebreaker_4_DDR5_03-519x400.png 519w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/10/23083638/SK-hynix_Rulebreaker_4_DDR5_03-768x592.png 768w" sizes="(max-width: 1000px) 100vw, 1000px" /></p>
<p class="source" style="text-align: center;">SK hynix’s validation strategy involves ensuring broad compatibility, internal collaboration, and customized testing</p>
<p>&nbsp;</p>
<h3 class="tit">Validation: The Final Piece of the DDR5 Evolution Puzzle</h3>
<p>Since SK hynix <a href="https://news.skhynix.com/sk-hynix-launches-worlds-first-ddr5-dram/" target="_blank" rel="noopener noreferrer"><span style="text-decoration: underline;">launched the world’s first DDR5 DRAM in 2020</span></a>, rapid and reliable validation has played a crucial role in the company’s outstanding progress in the field. The company’s numerous milestones in DDR5 and DRAM scaling technology include the industry-first validation of its <a href="https://news.skhynix.com/sk-hynix-obtains-industrys-first-validation-for-1anm-ddr5-dram-on-the-4th-gen-intel-xeon-scalable-processor/" target="_blank" rel="noopener noreferrer"><span style="text-decoration: underline;">1anm DDR5 with the 4th Gen Intel® Xeon® Scalable processor</span></a> in January 2023. In May of the same year, the company announced it had <a href="https://news.skhynix.com/sk-hynix-enters-industrys-first-compatibility-validation-process-for-1bnm-ddr5-server-dram/" target="_blank" rel="noopener noreferrer"><span style="text-decoration: underline;">developed the industry’s most advanced 1bnm DDR5 and begun validation with Intel</span></a>.</p>
<p>While the semiconductor industry has faced increasing difficulty in advancing the 10 nm process technology, SK hynix overcame the obstacles thanks in part to its robust validation strategy. This is set to continue with the validation of its 1c DDR5 product, which aims to verify key specifications of the new DRAM.</p>
<p><img loading="lazy" decoding="async" class="aligncenter wp-image-16100 size-full" title="The 1c DDR5 offers superior operating speeds and power efficiency compared to the previous generation" src="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/10/23083648/SK-hynix_Rulebreaker_4_DDR5_04.png" alt="The 1c DDR5 offers superior operating speeds and power efficiency compared to the previous generation" width="1000" height="588" srcset="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/10/23083648/SK-hynix_Rulebreaker_4_DDR5_04.png 1000w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/10/23083648/SK-hynix_Rulebreaker_4_DDR5_04-680x400.png 680w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/10/23083648/SK-hynix_Rulebreaker_4_DDR5_04-768x452.png 768w" sizes="(max-width: 1000px) 100vw, 1000px" /></p>
<p class="source" style="text-align: center;">The 1c DDR5 offers superior operating speeds and power efficiency compared to the previous generation</p>
<p>&nbsp;</p>
<p>In comparison to 1b DDR5, the 1c DDR5 product offers 11% faster operating speeds of 8 gigabits (Gbps) per second and a more than 9% improvement in power efficiency. As part of the validation process which is progressing smoothly, SK hynix is currently working with server CPU suppliers to verify the product’s stable performance and ensure it meets the expected operational standards.</p>
<p>Looking ahead, the successful development of 1c DDR5 has established a benchmark for subsequent DRAM product lines to be developed with the 1c node, including HBM<sup>5</sup>, LPDDR<sup>6</sup>, and GDDR<sup>7</sup>. In terms of validation, the company is striving to enhance the efficiency and overall process for future products. In particular, the company aims to reduce risk factors in future validation processes, ensuring higher quality and reliability for its next-generation products.</p>
<p style="font-size: 14px; font-style: italic; color: #555;"><sup>5</sup><strong>High Bandwidth Memory (HBM)</strong>: A high-value, high-performance product that possesses much higher data processing speeds compared to existing DRAMs by vertically connecting multiple DRAMs with through-silicon via (TSV).<br />
<sup>6</sup><strong>Low Power Double Data Rate (LPDDR)</strong>: A line of low-power DRAM for mobile devices, including smartphones and tablets, aimed at minimizing power consumption and featuring low voltage operation.<br />
<sup>7</sup><strong>Graphics DDR (GDDR)</strong>: A standard specification of graphics DRAM defined by the Joint Electron Device Engineering Council (JEDEC) and specialized for processing graphics more quickly. It is now one of the most popular memory chips for AI and big data applications.</p>
<h3 class="tit">Rulebreaker Interview: Yoosung Lee, DRAM Server Product Planning</h3>
<p><img loading="lazy" decoding="async" class="aligncenter wp-image-16101 size-full" title="Rulebreaker Interview: Yoosung Lee, DRAM Server Product Planning" src="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/10/23083654/SK-hynix_Rulebreaker_4_DDR5_05.png" alt="Rulebreaker Interview: Yoosung Lee, DRAM Server Product Planning" width="1000" height="650" srcset="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/10/23083654/SK-hynix_Rulebreaker_4_DDR5_05.png 1000w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/10/23083654/SK-hynix_Rulebreaker_4_DDR5_05-615x400.png 615w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/10/23083654/SK-hynix_Rulebreaker_4_DDR5_05-768x499.png 768w" sizes="(max-width: 1000px) 100vw, 1000px" /></p>
<p>To find out more about the company’s innovative approach to validation, the SK hynix Newsroom spoke with Technical Leader (TL) Yoosung Lee of DRAM Server Product Planning. Lee’s department plays a key role in collaborating with customers such as SoC companies to validate products. He discussed how the company encourages employees to take a different approach to their work and the improvement plans for validation.</p>
<div style="border: none; background: #f2f2f2; height: auto; padding: 10px 30px; margin-bottom: 10px; color: #000;">
<p><em><span style="text-decoration: underline;"><strong>How do you believe the company is motivating team members to strive for rulebreaking achievements, such as the goal of validating 1c DDR5? </strong></span></em></p>
<p>“We prioritize recognizing and rewarding the process rather than solely focusing on outcomes. Rulebreaking isn’t always about bold, instant breakthroughs. It’s often the quiet persistence—the repetition, fine-tuning, and seamless collaboration—that lays the foundation for true innovation.</p>
<p>“In addition, we offer a range of educational opportunities, including AI technology training and seminars, to ensure our team members stay informed about market trends and technological advancements.”</p>
<p><em><span style="text-decoration: underline;"><strong>How do you foresee the future validation of 1cnm DDR5 impacting the validation process of next-generation products?</strong></span></em></p>
<p>“When completed, the validation of the 1cnm DDR5 is expected to set a benchmark for subsequent products built on 1cnm technology. This achievement is likely to streamline the validation process for future products by verifying their quality upfront, thereby mitigating potential risks and enhancing reliability across the board.</p>
<p>“As 1cnm technology has just taken its first steps, continuous validation is necessary to ensure the stable supply of products to all customers in the future. We are currently supplying samples for validation with both already-released CPUs and those that will be released in the future, and we plan to continue supplying these samples.”</p>
<p><img loading="lazy" decoding="async" class="aligncenter wp-image-16102 size-full" title="Yoosung Lee" src="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/10/23083705/SK-hynix_Rulebreaker_4_DDR5_06.png" alt="Yoosung Lee" width="1000" height="650" srcset="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/10/23083705/SK-hynix_Rulebreaker_4_DDR5_06.png 1000w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/10/23083705/SK-hynix_Rulebreaker_4_DDR5_06-615x400.png 615w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/10/23083705/SK-hynix_Rulebreaker_4_DDR5_06-768x499.png 768w" sizes="(max-width: 1000px) 100vw, 1000px" /></p>
<p>&nbsp;</p>
<p><em><span style="text-decoration: underline;"><strong>How does SK hynix plan to enhance its validation process? </strong></span></em></p>
<p>“To make the validation process more efficient, we aim to build a system that achieves maximum results with minimal resources. To achieve this, we plan to strengthen collaboration with SoC companies and propose and discuss various validation strategies.</p>
<p>“Additionally, to respond quickly to plan changes and urgent sample requests, we will work with relevant departments to identify and improve any necessary elements in the sample production process.</p>
<p>&#8220;Overall, our strategy is to be proactive, not reactive, by responding to the market without resting on our laurels.&#8221;</p>
</div>
<p>&nbsp;</p>
<p><span style="color: #ffffff; background-color: #f59b57;"><strong>&lt;Other articles from this series&gt;</strong></span></p>
<p><span style="text-decoration: underline;"><a href="https://news.skhynix.com/rulebreaker-revolutions-mr-muf-unlocks-hbm-heat-control/">[Rulebreakers’ Revolutions] How MR-MUF’s Heat Control Breakthrough Elevated HBM to New Heights</a></span></p>
<p><span style="text-decoration: underline;"><a href="https://news.skhynix.com/rulebreakers-revolutions-hkmg-advances-mobile-dram-scaling/">[Rulebreakers’ Revolutions] How SK hynix Broke Barriers in Mobile DRAM Scaling With World-First HKMG Application</a></span></p>
<p><span style="text-decoration: underline;"><a href="https://news.skhynix.com/rulebreakers-revolutions-design-scheme-elevates-hbm3e/">[Rulebreakers’ Revolutions] Innovative Design Scheme Helps HBM3E Reach New Heights</a></span></p>
<p>&nbsp;</p>
<p><a href="https://linkedin.com/showcase/skhynix-news-and-stories/" target="_blank" rel="noopener noreferrer"><img loading="lazy" decoding="async" class="size-full wp-image-15776 aligncenter" src="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/09/13015412/SK-hynix_Newsroom-banner_1.png" alt="" width="800" height="135" srcset="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/09/13015412/SK-hynix_Newsroom-banner_1.png 1000w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/09/13015412/SK-hynix_Newsroom-banner_1-680x115.png 680w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2024/09/13015412/SK-hynix_Newsroom-banner_1-768x130.png 768w" sizes="(max-width: 800px) 100vw, 800px" /></a></p><p>The post <a href="https://skhynix-news-global-stg.mock.pe.kr/rulebreakers-revolutions-ddr5-validation-in-diverse-market/">[Rulebreakers’ Revolutions] How SK hynix’s Server DRAM Validation Process Succeeds in a Diverse Server CPU Market</a> first appeared on <a href="https://skhynix-news-global-stg.mock.pe.kr">SK hynix Newsroom</a>.</p>]]></content:encoded>
					
		
		
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		<item>
		<title>Interview With the SK hynix Team Behind MCR DIMM, “the Best Server DRAM”</title>
		<link>https://skhynix-news-global-stg.mock.pe.kr/interview-with-the-sk-hynix-team-behind-mcr-dimm/</link>
		
		<dc:creator><![CDATA[user]]></dc:creator>
		<pubDate>Tue, 17 Jan 2023 06:00:41 +0000</pubDate>
				<category><![CDATA[Culture & People]]></category>
		<category><![CDATA[featured]]></category>
		<category><![CDATA[DDR5]]></category>
		<category><![CDATA[MCRDIMM]]></category>
		<category><![CDATA[server DRAM]]></category>
		<guid isPermaLink="false">http://admin.news.skhynix.com/?p=10781</guid>

					<description><![CDATA[<p>SK hynix once again proved to be the first and the best when it comes to innovations as it became the world&#8217;s first company to successfully develop working samples of the DDR5 MCR DIMM1, a server DRAM product, in December 2022. This successful development of a sample significantly enhances the performance of the server DRAM. [&#8230;]</p>
<p>The post <a href="https://skhynix-news-global-stg.mock.pe.kr/interview-with-the-sk-hynix-team-behind-mcr-dimm/">Interview With the SK hynix Team Behind MCR DIMM, “the Best Server DRAM”</a> first appeared on <a href="https://skhynix-news-global-stg.mock.pe.kr">SK hynix Newsroom</a>.</p>]]></description>
										<content:encoded><![CDATA[<p><img loading="lazy" decoding="async" class="size-full wp-image-10782 aligncenter" src="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/01/13085207/%EC%9D%B4%EB%AF%B8%EC%A7%80_1_1000.png" alt="" width="1000" height="670" srcset="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/01/13085207/%EC%9D%B4%EB%AF%B8%EC%A7%80_1_1000.png 1000w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/01/13085207/%EC%9D%B4%EB%AF%B8%EC%A7%80_1_1000-597x400.png 597w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/01/13085207/%EC%9D%B4%EB%AF%B8%EC%A7%80_1_1000-768x515.png 768w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/01/13085207/%EC%9D%B4%EB%AF%B8%EC%A7%80_1_1000-900x604.png 900w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/01/13085207/%EC%9D%B4%EB%AF%B8%EC%A7%80_1_1000-400x269.png 400w" sizes="(max-width: 1000px) 100vw, 1000px" /></p>
<p>SK hynix once again proved to be the first and the best when it comes to innovations as it became the world&#8217;s first company to <span style="text-decoration: underline;"><a href="https://news.skhynix.com/sk-hynix-develops-mcr-dimm/" target="_blank" rel="noopener noreferrer">successfully develop working samples of the DDR5 MCR DIMM</a></span><sup>1</sup>, a server DRAM product, in December 2022. This successful development of a sample significantly enhances the performance of the server DRAM. The biggest improvement is that the MCR DIMM breaks away from the traditional idea of focusing solely on the operating speed of individual DRAM units to boost the speed of DDR5. Instead, it adds a customized module to individual DRAM units to increase the speed. The operating speed of the MCR DIMM is over 8 Gbps (gigabits per second), which is at least 80% faster than existing server DRAMs that have a speed of 4.8 Gbps. This makes it the fastest server DRAM in the world.</p>
<p style="font-size: 14px; font-style: italic; color: #555;"><sup>1</sup>MCR DIMM (Multiplexer Combined Ranks Dual In-line Memory Module): A module product with multiple DRAMs bonded to a motherboard, in which two ranks<sup>2</sup> (basic information processing units) operate simultaneously, resulting in improved speed.</p>
<p style="font-size: 14px; font-style: italic; color: #555;"><sup>2</sup>Rank: A set of basic data transfer units exported from the DRAM module to the CPU. Usually, 64 bytes of data are transferred to the CPU as a unit.</p>
<p>As SK hynix sees the server memory market as pivotal to overcoming the recent downturn of the semiconductor industry, the company has focused on developing technologies related to server DRAMs. The SK hynix team who achieved innovation through new methods and paths emphasized the importance of challenging oneself, saying: &#8220;No matter how difficult it is, opening up new paths is always worthwhile.&#8221; This was the motivation for the MCR DIMM team members, Kim Hong Bae, Kim Yeong Jun, and Yi Jong Yun, who committed themselves to developing the leading server DRAM.</p>
<p><img loading="lazy" decoding="async" class="alignnone size-full wp-image-10794 aligncenter" src="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/01/13085743/SK-hynix_MCRDIMM-Developer-Interview_05.png" alt="" width="1000" height="700" srcset="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/01/13085743/SK-hynix_MCRDIMM-Developer-Interview_05.png 1000w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/01/13085743/SK-hynix_MCRDIMM-Developer-Interview_05-571x400.png 571w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/01/13085743/SK-hynix_MCRDIMM-Developer-Interview_05-768x538.png 768w" sizes="(max-width: 1000px) 100vw, 1000px" /></p>
<p class="source">▲Figure 1. The members behind the development of the MCR DIMM—Kim Hong Bae (left), Yi Jong Yun (middle),<br />
and Kim Yeong Jun (right)—discussing the server DRAM’s development process.</p>
<p>&nbsp;</p>
<h3 class="tit">Server DRAMs are Essential for Future Digital Era’s Infrastructure</h3>
<p>Today, society is undergoing drastic changes. Almost every piece of information is generated, recorded, and shared digitally. This is what’s called digital transformation (DT), and the server DRAM is a crucial component of the infrastructure that builds this digital world. Therefore, SK hynix’s development of the MCR DIMM is meaningful in many ways.</p>
<p>The project head, Professional Leader Kim Hong Bae at DRAM Product Planning, emphasized the role of the server DRAM. “You need wider highways and faster cargo vehicles if you want to efficiently transport shipments. We call this logistics infrastructure,” Kim said. “The role of server DRAMs is similar to that of a cargo vehicle. It helps to move data faster and smoother. That is why I think a server DRAM is the core component of the digital world’s infrastructure.&#8221;</p>
<p>He continued: &#8220;Looking at it from an infrastructure point of view, the importance of the MCR DIMM is considerable. A DRAM that can process data more than 80% faster than existing DRAMs and in a much more stable way has been developed to address the exponentially increasing amount of data nowadays. And considering these performance improvements, this is truly an extraordinary achievement.&#8221;</p>
<p><img loading="lazy" decoding="async" class="alignnone size-full wp-image-10791 aligncenter" src="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/01/13085701/SK-hynix_MCRDIMM-Developer-Interview_01.png" alt="" width="1000" height="673" srcset="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/01/13085701/SK-hynix_MCRDIMM-Developer-Interview_01.png 1000w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/01/13085701/SK-hynix_MCRDIMM-Developer-Interview_01-594x400.png 594w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/01/13085701/SK-hynix_MCRDIMM-Developer-Interview_01-768x517.png 768w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/01/13085701/SK-hynix_MCRDIMM-Developer-Interview_01-400x269.png 400w" sizes="(max-width: 1000px) 100vw, 1000px" /></p>
<p class="source">▲Figure 2. &#8220;The role of server DRAMs is similar to that of a cargo vehicle. It helps move data faster and smoother,&#8221;<br />
said Professional Leader Kim Hong Bae, DRAM Product Planning.</p>
<p>&nbsp;</p>
<p>Kim Yeong Jun, a technical leader at DRAM Product Planning, placed great importance on being able to respond to the rapid growth of data that will occur in the near future. “I think the amount of data we will create down the road will increase tremendously. Therefore, the amount of data that DRAMs need to process will also surely increase. What would happen if every household has an 8K TV? In order to supply 8K-level streaming to every home, media servers will have to process an enormous amount of data. It is inevitable that we will need hardware that can handle more data,” Kim said. “The problem is that it will not only be the video field that will develop in such a way. We are currently facing an era of digital transformation where all areas including finance, shopping, travel, culture, and transportation are being digitalized. Eventually, every aspect of an individual’s life will generate data, so servers that process this data will require higher-level systems and hardware. I can confidently say that SK hynix has prepared itself for these future demands.”</p>
<p>Technical Leader Yi Jong Yun at DRAM AE (Application Engineering), who conducted the MCR DIMM test, also showed pride in the successful development. “SK hynix has continued to show a strong presence in the server DRAM market, and the success of the MCR DIMM’s development served as an opportunity to declare once again that our company produces the best server DRAMs,” Yi said. “As my colleagues already mentioned, I am looking forward to the future that the MCR DIMM will make.”</p>
<h3 class="tit">SK hynix Pushes Technological Limits to Lead the Server DRAM Market</h3>
<p>The MCR DIMM represents a leap forward in performance, typically unseen in the DRAM sector. It is common to see an operating speed increase of about 800 Mbps (Megabits per second) when developing a new generation of the DDR5 DRAM. For example, if the DRAM offered an operating speed of 4,800 Mbps, the next generation is expected to have a speed of approximately 5,600 Mbps. However, SK hynix made yet another breakthrough by developing the MCR DIMM that boasts an operating speed of over 8,000 Mbps.</p>
<p><img loading="lazy" decoding="async" class="size-full wp-image-10795 aligncenter" src="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/01/13085747/SK-hynix_MCRDIMM-Developer-Interview_06.gif" alt="" width="1000" height="850" /></p>
<p class="source">▲Figure 3. The operation structure of the world&#8217;s fastest server DRAM, the MCR DIMM.</p>
<p>&nbsp;</p>
<p>Kim Hong Bae had more to add on the performance innovations of the MCR DIMM. “In comparison to server DRAMs that had a fixed rate of performance enhancement for each generation, server CPUs (Central Processing Unit) were expected to have a performance enhancement rate that was higher than that of DRAMs,” Kim said. “It was critical to prevent a considerable difference between the CPU’s operating speed and the DRAM’s data processing speed, as the DRAM could eventually cause a bottleneck<sup>3</sup>. So, we achieved a rapid improvement in the MCR DIMM’s performance by making new and unprecedented innovations.”</p>
<p style="font-size: 14px; font-style: italic; color: #555;"><sup>3</sup>Bottleneck: Originally a term to describe traffic disruption typically caused by vehicles waiting for signals or entering narrower roads. In the computer industry, a bottleneck refers to the situation when one component reaches its maximum capability and restricts the performance of other components in the system.</p>
<p><img loading="lazy" decoding="async" class="alignnone size-full wp-image-10792 aligncenter" src="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/01/13085710/SK-hynix_MCRDIMM-Developer-Interview_02.png" alt="" width="1000" height="673" srcset="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/01/13085710/SK-hynix_MCRDIMM-Developer-Interview_02.png 1000w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/01/13085710/SK-hynix_MCRDIMM-Developer-Interview_02-594x400.png 594w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/01/13085710/SK-hynix_MCRDIMM-Developer-Interview_02-768x517.png 768w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/01/13085710/SK-hynix_MCRDIMM-Developer-Interview_02-400x269.png 400w" sizes="(max-width: 1000px) 100vw, 1000px" /></p>
<p class="source">▲Figure 4. “While not changing the way the existing DDR5 DRAM units are used, we designed two ranks—the operation unit of the module—to operate at the same time,&#8221; said Technical Leader Kim Yeong Jun at DRAM Product Planning, regarding the MCR DIMM.</p>
<p>&nbsp;</p>
<p>Kim Yeong Jun provides a behind-the-scenes explanation of the newly attempted techniques that went into the product development. “In the process of developing the MCR DIMM, we introduced a new concept to increase operating speeds,” he explained. “While not changing the way the existing DDR5 DRAM units are used, we designed two ranks—the operation unit of the module—to operate at the same time. While 64 bytes of data are transmitted in one rank, 128 bytes of data can be transmitted at once by operating two ranks simultaneously. A data buffer<sup>4</sup> is used for this operation as it combines the 64 bytes of data transmitted in two ranks and creates the collective transmit of 128 bytes.”</p>
<p>He added: “In particular, collaboration with global companies—Intel (U.S.) and Renesas (Japan)—played an important role in this development.” Intel, which develops server CPUs, and Renesas, which develops data buffers for the MCR DIMM, collaborated with SK hynix to create synergy.”</p>
<p style="font-size: 14px; font-style: italic; color: #555;"><sup>4</sup>Buffer: A component that is mounted on top of the DRAM module to optimize the performance of the signal transmission between the DRAM and the CPU. It is mainly installed in server DRAM modules that require high performance and stability.</p>
<h3 class="tit">A Challenge that Others Avoided Became a Chance to Innovate</h3>
<p>The development of the MCR DIMM was especially difficult because everything from the design to the testing process consisted of methods that no one had ever tried before. Since it was a distinct product developed without a standard, every part of the process was a challenge.</p>
<p><img loading="lazy" decoding="async" class="alignnone size-full wp-image-10793 aligncenter" src="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/01/13085720/SK-hynix_MCRDIMM-Developer-Interview_03.png" alt="" width="1000" height="673" srcset="https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/01/13085720/SK-hynix_MCRDIMM-Developer-Interview_03.png 1000w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/01/13085720/SK-hynix_MCRDIMM-Developer-Interview_03-594x400.png 594w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/01/13085720/SK-hynix_MCRDIMM-Developer-Interview_03-768x517.png 768w, https://d36ae2cxtn9mcr.cloudfront.net/wp-content/uploads/2023/01/13085720/SK-hynix_MCRDIMM-Developer-Interview_03-400x269.png 400w" sizes="(max-width: 1000px) 100vw, 1000px" /></p>
<p class="source">▲Figure 5. “In the case of the MCR DIMM, it was not easy to build a completely new test environment.”, said Technical Leader Yi Jong Yun, DRAM AE, recalling the development of the groundbreaking test program for the MCR DIMM while holding a sample.</p>
<p>&nbsp;</p>
<p>The team members who developed the product described the biggest challenges they faced during the whole process. “In the case of the MCR DIMM, it was not easy to build a completely new test environment,” Yi Jong Yun said. “In fact, when developing a new generation of current products, there is a target for performance level. In the case of DDR, the industry expects a performance increase of 800 Mbps for new generations. However, it was difficult to set a target since there were no references or related information in the MCR DIMM’s case. Developing cannot be done with only the concept; it needs a specific target as well. Accordingly, it was difficult to create a test program and environment to bring our concept into life. I am proud that SK hynix was able to overcome these hurdles and set up the foundation to lead in the server DRAM market by successfully developing the MCR DIMM.”</p>
<p>As for Kim Yeong Jun, he recalls initially proposing the product to the company. “The MCR DIMM is a new concept that has never existed before, so I remember working hard to convince colleagues on why we should develop this product and why clients would want to buy it. We needed to convince others that it was worth breaking away from the existing DRAM development methods to go with a new development method which is a risk.” Kim said. “Ultimately, we are still defining the MCR DIMM market since it is not fully solidified yet. Since the project has not been completely finalized and as there is still time left until its mass production, greater efforts are needed in the future. When the development and mass production of MCR DIMMs are completed and widely adopted in the market, I am really looking forward to the customers’ reactions and the changes that will occur in the server DRAM industry.”</p>
<p>Kim Hong Bae also expressed his anticipation for the wide use of MCR DIMMs down the road. “We are realizing how important data centers and servers are these days. And through our experiences, we know that if servers do not function, many aspects in our daily life stop. In fact, server facilities are a key piece of modern-day infrastructure,” Kim said. “For those of us who have become accustomed to the digital world, data centers and servers have become indispensable, and SK hynix is committed to building better data centers and servers for everyone. I hope we can contribute to creating a better future by developing more innovative products, starting with the MCR DIMM.”</p>
<p>While the members take much pride in the fact that their product has improved performance by more than 80% compared to existing products, they admit that there is still much work to be done. As they continue to develop the MCR DIMM, the team members of SK hynix, who have achieved innovation by tackling challenges that only a few have ever dared to try, will not shy away from taking the road less traveled in the future as well.</p><p>The post <a href="https://skhynix-news-global-stg.mock.pe.kr/interview-with-the-sk-hynix-team-behind-mcr-dimm/">Interview With the SK hynix Team Behind MCR DIMM, “the Best Server DRAM”</a> first appeared on <a href="https://skhynix-news-global-stg.mock.pe.kr">SK hynix Newsroom</a>.</p>]]></content:encoded>
					
		
		
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