SK hynix now ​maintains a stable supply of neon gas despite the unstable international market, and is able to significantly reduce purchasing costs. The company aims to use 100% of locally produced neon gas by 2024.

Until now, Korean semiconductor companies have relied solely on imports of neon gas. In recent years, neon prices have been soaring as the international situation in major overseas production regions has become disrupted. In order to address the risk of supply instability, SK hynix has collaborated with Korean partners TEMC, a semiconductor gas manufacturer, and steelmaker POSCO, to produce the gas domestically.

A large air separation unit (ASU) plant is required to extract neon, which is rare in the air, resulting in a high initial investment. In response to SK hynix’s objective to procure neon locally, TEMC and POSCO collaborated to develop a technology for producing neon at a low cost by utilizing existing facilities. SK hynix evaluated and verified the locally produced neon and succeeded in using it in the semiconductor manufacturing process earlier this year. The neon is produced by POSCO, processed by TEMC, and then supplied to SK hynix as a top priority.

Neon is the main component of excimer laser gas used in semiconductor photolithography . The excimer laser gas produces a short wavelength ultraviolet laser light that engraves electric circuits onto wafers. Although 95% of the excimer laser gas is composed of neon, neon is a rare gaseous element that makes up only 0.00182% of the air.

SK hynix introduced locally produced neon to semiconductor photolithography in April this year for the first time in the domestic semiconductor industry, increasing its use to 40% of all neon used in the manufacturing process. By 2024, all of SK hynix’s semiconductor manufacturing will use locally produced neon.

In addition, to reduce the risk of raw material shortages, SK hynix plans to procure krypton and xenon gas locally by June 2023 both of which are used in the etching process^* of semiconductors. As a leading global technology company, it plans to continue securing the resources necessary for the development of advanced semiconductor technologies.

^*Etching process: the process of removing unnecessary parts on the exterior of the circuit engraved on the wafer through photolithography.

“Cooperation with domestic partners greatly contributed to stabilizing supply in spite of an uncertain market due to the unstable international situation. We plan to strengthen the semiconductor raw material supply chain through continuous cooperation with our partners,” said Hongsung Yoon, Head of FAB Materials Procurement at SK hynix.

The post An Industry First: SK hynix Sources Neon Gas Locally, Increases Its Use in Chip Production to 40% first appeared on SK hynix Newsroom.

As part of April’s Special Safety Week, SK hynix held an online social media event featuring Gaon, the quadruped safety robots. Renamed as Gaon by SK hynix after being adopted, the robot is equipped with the latest AI software, it is an expert safety inspector which can maneuver freely and “see” without direct human supervision.

Photo 1. Winners of the online social media event at SK hynix

To take part in the event, participants were encouraged to upload a picture with Gaon to their social media channels with the hashtags #SKhynix and #Safety. Winners were randomly selected and received a prize.

Safety First

Accidents can happen in an instant anytime, anywhere. Safety is a core value at any industrial worksite. The same is true at SK hynix, where building a safe working environment is a top priority. It requires all members to voluntarily play an active role. And when people understand the organization cares for their safety and well-being, this typically leads to better overall performance. The best way to prevent accidents from occurring in the workplace is identifying potential hazards in advance.

Photo 2. Members playing active roles to build a safe working environment at SK hynix

One example at SK hynix is the use of Safety Compliance Cards, or SCCs, whereby workers take part in isolating potentially dangerous and high-risk situations. Monthly inspections occur based on the SCC and feedback is given to improve safety management. In addition, safety teams conduct weekly and monthly inspections. Ultimately, accident prevention begins on-site by building a culture conducive to identifying and handling possible risk factors.

When Safety and Technology Converge

As a high-tech company, it’s only natural that SK hynix is applying cutting-edge technology to safety management. In particular, the company has established a new task force, known as the Smart Safety IoT TF, dedicated to using Internet of Things (IoT) technology in developing on-site safety protocols. The company has also laid out a Smart Safety Roadmap that uses artificial intelligence, Digital Twin, and robot technology to identify and prevent accidents.

The Smart Safety IoT TF demonstrated its latest technological advances as part of the S.DRAM, or Safety, Digital Twin, Robot, AI, and Metaverse, project earlier in February. The task force introduced seven new concepts at the event aimed at improving safety: four-legged robots, AR equipment inspections, VR workplace training, intelligent CCTVs, fall-protection airbags, leak detection sensors, and smart Safety Ball which monitors enclosed space.

Figure 1. Concepts of how SK hynix converges safety and technologies

An example of this played out is how augmented reality (AR) solutions ensure equipment’s safe and stable status. By storing safety features of different equipment models in a connected database, the system supports our members establish safe production environment and provides precise feedbacks per each malfunction, and as a result prevents safety accidents.

Photo 3. Performing an AR inspection

Industrial safety management involves creating and maintaining a safe and efficient workplace. Safety measures provide the basis for a better working environment, and all members of an organization can help identify potential hazards, even if it requires the help of a four-legged companion.

Photo 4. Chang-in Kim, Technical Leader at Smart Safety IoT TF

Technical Leader Chang-in Kim of the task force says the purpose of the event was to give a glimpse into how technology is being applied to improve internal safety measures.

“We planned the February demonstration as a preview of how the workplace will change moving forward, and are currently eager to reflect various feedbacks from the event to our safety projects.” Kim said. “We will continuously work to communicate with team members to create a safe worksite.”

The post Using Technology to Create a Safer Workplace first appeared on SK hynix Newsroom.

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In semiconductor manufacturing, even the tiniest speck of dust can have a fatal impact on the electrical properties of the integrated circuit. If a pollutant generated in the process falls on top of a wafer or if small bumps are created on the surface of a wafer, this can cause a defect in the chip, lowering yield and dropping cost competitiveness. The more semiconductor circuit line width is reduced with scaling, the more intricate it becomes for the level of dust that can be permitted. ‘Defectless wafer’ that is clean, smooth and without a speck of dust is an essential element that determines product competitiveness.

Our newsroom met with the members of CLEAN & CMP Technology under the Manufacturing Technology department who are responsible for the production of ‘defectless wafers’ to learn more about their work.

Cleaning & CMP Process: Cleaning and Planarizing Wafer Surface

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A wafer goes through various processes, including photo, etching, diffusion, and thin film, before becoming a complete semiconductor. Among these processes, the cleaning process physically or chemically removes pollutants on the wafer surface before and after different steps in the processing. Methods can be largely categorized into ‘wet cleaning,’ which uses chemicals, and ‘dry cleaning,’ which uses gas like plasma.

In the past, the cleaning process was considered as an auxiliary process under another processes, but it has recently become an essential key process necessary in producing reliable semiconductors. As circuit line widths reduced with increased degree of integration among elements, it became essential to further advance the way of controlling defects in wafers. Therefore, there is an increasing trend in rising importance of the cleaning process in removing residual foreign substances after various processes.

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If the cleaning process is about cleaning wafer surface, the Chemical Mechanical Polishing (CMP) process is a process of smoothing the surfaces of wafers. The CMP process refers to the process of planarizing wafer surface by polishing the film surface of wafers that has bumps using a combination of chemical or mechanical forces.

This process uses the mechanism where areas of the chip of different heights are polished under different pressures when it comes into contact with a CMP pad, making the area that is relatively bumpier planarized first under a higher pressure. A chemical slurry is used on the surface in conjunction to prevent any scratches on the surface and to complement any instability in the process control.

Due to reduced line width following recent technological advancements, the degree of uniformity has gained more importance than before in the photo process. Similar level of defects has now a bigger impact on more cells, causing an even bigger drop in yield. As a result, the role of the CMP process of removing any irregular topography on the wafer surface is expanding. The process is gaining more significance in post-process stabilization by not only planarizing the surface, but also improving wafer defect, contributing to improving yield. Due to its even greater importance, every time a device is upgraded, the number of required CMP processes is increasing with even stricter standards.

Vision of CLEAN & CMP Technology: “Best Quality through Stabile Production and Technology Innovation”

There are eleven teams associated with the CLEAN & CMP process: Icheon FAB and Cheongju FAB have both Cleaning Technology Team and CMP Technology Team, which take charge of the cleaning process and CMP process, respectively. C&C Technology Innovation Team, which plays the role of a steersman in standardizing duties per fab and setting forth the overall direction for the organization, as well as the C&C Response Engineering Team, which oversees process dispersion improvement and endurance management of each fab.

The Cleaning Technology Team adopts and applies different methods such as the ‘batch-type’ cleaning¹ or the ‘single-type’ cleaning² out of wet cleaning methods according to the device and process. Because key parameters that determine the concept and endurance of equipment differ, the cleaning process is performed based on a deep understanding of both directions. In addition, the process is performed by choosing the right chemicals that will effectively remove defects according to the types and properties of the wafer defect.

A cleaning process that uses chemicals causes various defects due to the surface tension of the liquid chemical. The Cleaning Technology Team is dedicated to ensuring competitiveness by introducing ‘supercritical cleaning process’ that uses supercritical fluid that has no surface tension to control and further advance the process. The team is also gradually converting batch-type cleaning processes, which are hard to control with precision, into single-type processes.

The CMP process is performed by two parts – the polisher part and the cleaning part. In the polisher part, the slurry is injected onto the surface of the wafer and pad to polish off the wafer surface. And in the cleaning part, wet cleaning is performed using a brush to remove any residual substances left on the wafer surface after polishing. The process also includes a drying process after cleaning.

With circuit line width becoming more miniaturized, improving dispersion is also becoming more important to ensure process margin in the CMP process as well. The CMP Technology Team uses an Advanced Process Control (APC)³ system to optimize process conditions in real time. However, previous APC models were set based on the experience of the engineer in charge, meaning that improvements were influenced according to the skills and capabilities of the individual. Therefore, the CMP Technology Team recognizes the importance of developing an algorithm-based APC and a model that can leverage the experience of the engineer. It is implementing improvement measures of applying Model Integrated Process Control Optimizer (MICO) to further advance APC. The team is also focused on improving durables that can improve CMP Scratch (CMSC) defects generated in the CMP process.

The common objective pursued by CLEAN & CMP Technology is ‘ensuring the best quality through stabile production and technology innovation.’ To achieve this, members pursue four core values of ‘safety,’ ‘communication,’ ‘happiness,’ and ‘One Team Spirit.’ CLEAN & CMP Technology is dedicated to improving productivity and technology with a priority on ‘safety’ first and foremost due to the nature of processes that handles numerous equipment and materials.

Pointers from our CLEAN & CMP Technology Engineers

Jin Soo Kim, Technical Leader at DRAM Cleaning Technology Team

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Q. Please tell us about your job.

Jin Soo Kim, Technical Leader (TL)
I’m an equipment engineer at DRAM Cleaning Technology Team. I am in charge of preventative maintenance, management, improvement activities and responding to various defects in cleansing equipment.

Min Hyuk Choi, Technical Leader (TL)
As a process engineer at DRAM Cleaning Technology Team, I identify causes of various issues that occur during the cleaning process and find solutions to the issues.

Chan Bum Park, Technical Leader (TL)
The CMP Technology Team largely oversees tasks related to either the process or the equipment. Among these tasks, I oversee the overall duties related to the process. I am in charge of yield, quality, productivity, and improvement activities.

Hye Bin Kim, Technical Leader (TL)
As a process engineer at DRAM CMP Technology Team, I optimize and manage the process for stable and reliable production. I also implement various assessments to improve and enhance yield and productivity. In addition, I analyze relevant data and make improvements in case issues or problems occur.

Q. Could you introduce some competencies your job requires?

Jin Soo Kim, Technical Leader (TL)
There are many instances where inflection points in the hardware that were unrecognized before cause a butterfly effect leading to process incidents of massive scale as the level of complexity of the process increases. Therefore, the role requires a critical mind and awareness of even the smallest details. The role also requires a comprehensive perspective and analytical abilities to identify issues with a multifaceted approach.

Min Hyuk Choi, Technical Leader (TL)
Collaborating with equipment and device engineers is critical for process engineers, and therefore an advanced level of interpersonal skills is essential.

Chan Bum Park, Technical Leader (TL)
Most of the work involves analyzing data captured in the process and from equipment to solve issues, which requires accurate analytical ability. The job also requires a wide perspective that can see issues from a comprehensive spectrum of aspects because equipment don’t always operate under same circumstances.

Hye Bin Kim, Technical Leader (TL)
In many cases, my job involves communicating with not only members from our team, but also with other teams and stakeholders. Therefore, good communication skills are important. Managing the process that has numerous variables requires a meticulous approach and accurate analytical skills. The role sometimes demands fast decisions to be made in case issues occur, and therefore, the ability to make accurate analysis based on data is very helpful.

Min Hyuk Choi, Technical Leader at DRAM Cleaning Technology Team

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Q. What challenges have you encountered and how did you overcome them?

Jin Soo Kim, Technical Leader (TL)
The chance of actually checking a defect in an equipment and identifying the cause of the problem is extremely limited, thus it requires a process of conducting assessments in various ways to continuously narrow down on the cause of the issue. I also aim to come up with solutions by looking at the problem from a wide range of perspectives by leveraging collective intelligence rather than struggling with the issue alone.

Min Hyuk Choi, Technical Leader (TL)
Many times, it is difficult to identify the cause of process issues and come up with solutions alone. I communicate with other engineers and share thoughts and ideas to identify points of improvement to find the right solution.

Chan Bum Park, Technical Leader (TL)
Because of the nature of semiconductor manufacturing, having to explore and solve for an area with no visibility is the biggest challenge most members face. And the characteristics and features of fabs are all different, making it difficult to establish ‘One Fab.’ To overcome this, building a trusting relationship with relevant teams and stakeholders is crucial. We strive to think from a larger perspective from an organization and company’s point of view, beyond just our team.

Hye Bin Kim, Technical Leader (TL)
Due to the nature of the complexity in semiconductor processing, in many cases, there are times when there is more than just one cause to an issue because of the connectivity between different processes, the diversity of parameters, and time change. So, it is sometimes frustrating when there seems to be no clear one solution. There are times when I get stuck on the first hypothesis or a certain conclusion even while looking at the data. And the advice from close colleagues was what helped me solve the issue. I am also studying a statistics program to have a deeper understanding of data analysis while actively leveraging in-house training programs such as mySUNI (SK Group-led learning platform for employees) and SKHU (SK hynix University, integrated job competence training system) to improve my understanding of the overall semiconductor process.

Chan Bum Park (left), Technical Leader at C&C Technology Innovation Team

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Q. What are the fascinating aspects of your work?

Jin Soo Kim, Technical Leader (TL)
It is very rewarding when we solve a difficult problem by digging into the problem to the end. Equipment don’t lie. If there is a phenomenon, there is a definite cause of the problem. I think that is the biggest appeal in working with equipment and device. The pleasure you feel when you’ve decided on an approach based on gathered data and assessment results and you find out that the approach was the right approach is the privilege only equipment engineers can enjoy.

Min Hyuk Choi, Technical Leader (TL)
It is the most rewarding when I’ve cleared a process issue or when the improvement measure has effect. Being able to share various thoughts and ideas with other engineers through collaborating and learning things I haven’t thought of from others is also another attractive part of the job.

Chan Bum Park, Technical Leader (TL)
They were different every year. In my first year, it was exciting to learn new things. After that, it was rewarding when I identified solutions to a number of variables in a difficult problem and made improvements to solve them. Now, I feel rewarded when I have the chance to widen my perspective by communicating with both senior and junior members and as I create an atmosphere where the whole team can work efficiently through solving issues by identifying what my team needs.

Hye Bin Kim, Technical Leader (TL)
I feel a sense of accomplishment when I apply an improvement measure to solve an issue and see that my approach improves dispersion and yield after a feedback process. Of course, there are times that I didn’t get the results I aimed for, but there is beauty in the process of finding solutions.

Hye Bin Kim, Technical Leader at DRAM CMP Technology Team

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Q. What’s the atmosphere of the team like?

Jin Soo Kim, Technical Leader (TL)
Most issues that occur in the semiconductor process cannot be regarded as only an issue of the process or the equipment. Therefore, working with other engineers is extremely important. We make time to freely discuss issues and find effective solutions by enabling all members to communicate regardless of their years on the job or career experience. We manage our team under an ‘One Team’ system where there is autonomy in sharing thoughts and ideas but there is a clear structure and standard when it comes to making decisions or taking procedures.

Min Hyuk Choi, Technical Leader (TL)
Our team is horizontal and young. All members respect each other’s thoughts and communicate together regardless of work experience or years on the job.

Chan Bum Park, Technical Leader (TL)
We are dedicated to continuously improving our work environment through change and innovation. CLEAN & CMP organization gathers the thoughts of its members to build a happy and healthy environment and makes efforts to build a culture that fits each team’s characteristics based on the ideas of members.

Hye Bin Kim, Technical Leader (TL)
While it is a semiconductor fab that runs 24/7, there is a culture of recommending flexible work hours. It enables individuals to efficiently manage their time and it also helps us to refresh, which then improves overall work efficiency. We also actively support each other and collaborate on challenges and frequently share solutions or knowhows.

¹A process that cleans several sheets of wafers by dipping them in a tank filled with chemicals. It costs less and can process many wafers per unit of time but is inappropriate to use in cleaning delicate and advanced wafers.
²A process that cleans one wafer at a time in each chamber inside the device using chemical solution. It enables a more precise control in the process but is expensive and the device itself is highly complex.
³A system based on a control and abnormality identification algorithm based on wafer measurement and processing model that adjusts conditions by identifying regularity using previous process tendencies or past data.

The post Creating Defectless Wafers: A Look at CLEAN & CMP Technology first appeared on SK hynix Newsroom.

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In semiconductor manufacturing, thinfilm deposition refers to the technology of applying a very thin film of 1 µm(micrometer) or less of molecular or atomic materials onto the surface of a wafer. This film allows wafers, which start out in a non-conductive state, to have electrical properties. In other words, it serves as “a blank sheet of paper” to have fine circuit patterns drawn on in the subsequent process. The team in charge of this task at SK hynix is Thinfilm Technology under the Manufacturing & Technology Department.

Our newsroom met with the members of Cheongju NAND M11 CVD and PVD Technology Teams to have a glimpse of their job and the talents they seek to hire.

Uniform Thinfilm Deposition that Meets the Process Conditions

The purpose of thinfilm deposition is to add the electrical properties to the wafers to lay the foundation for the next process. The film is deposited by calculating the thickness of the thinfilm, refractivity, and absorptivity to meet the process conditions. The most important technique is to deposit the thinfilm uniformly throughout the wafer because such uniformity determines the level of precision of the circuit patterns created in the following photo and etching processes.

Among a variety of deposition methods, the most popular ones are Physical Vapor Deposition (PVD) and Chemical Vapor Deposition (CVD).

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PVD causes a physical reaction on a metal plate to coat metallic ions on a wafer. As PVD occurs at a low temperature and a high vacuum state, this method has advantages of low contamination from impurities and fast deposition. It is mainly used to deposit a metal layer, which transmits the electric force and signals of the wafer.

A typical PVD method is sputtering. When argon gas is admitted into a vacuum chamber and a high voltage power supply is connected, the gas becomes a plasma. At that point, a negative DC voltage is applied to convert argon atoms into cations. When the cations collide with the metal plate, small amounts of metallic elements are spalled. Sputtering is a method of depositing these metallic elements onto the wafer.

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CVD applies heat or plasma to vapor to induce chemical reactions to deposit the output onto the wafer. It has a higher step coverage (the degree of conformity of a film thickness at the bottom/sidewall of a feature to the top of the feature) than PVD. This method is mainly used for the deposition of dielectric layers. Also, it is utilized to deposit Anti-Reflective Coating (ARC), which controls diffuse reflection when drawing patterns in the photo process, or to place a hard mask on the wafer prior to etching to protect the underlying layer.

CVD is classified into four methods based on the operating conditions: Atmospheric Pressure CVD (APCVD), Thermal CVD, Plasma Enhanced CVD (PECVD), and High Density Plasma CVD (HDP-CVD).

APCVD is a CVD method at atmospheric pressure. A high wafer throughput and a simple device structure are big advantages of this process, but it has poor step coverage due to low degree of vacuum.

Thermal CVD uses thermal energy at a high-temperature environment, and the uniformity of the thinfilm deposited by this method is higher than that of APCVD. However, its deposition speed is slow and it poses risk factors due to the high temperature.

PECVD forms thinfilm at a low temperature by reducing the activation energy required for chemical reactions with radicals in plasma. It offers a high throughput and a satisfactory step coverage.

During HDP-CVD process, deposition and etching occur simultaneously performed in the chamber. The deposition is made at a low pressure and high-density plasma state. It is particularly useful for gap-filling the void.

Core Values of Thinfilm: “Technological Innovation for the Best Mass Production Technology”

There are seven teams associated with the thinfilm process: Icheon FAB and Cheongju FAB have both CVD Technology Team and PVD Technology Team, which take charge of deposition under Thinfilm Technology. Technology Innovation Team and Distribution Enhancement Team support the process.

PVD Technology Team performs PVD by using different methods in addition to sputtering, such as reactive ion etching (RIE)¹ and the Damascene process². This is part of their effort to find and implement the optimal deposition for each process. The team has been working on the development of a deposition technology to allow stable formation of a metal line under the cell.

CVD Technology Team is responsible for stable deposition of dielectric layers via HDP-CVD and PECVD methods. It is also in charge of depositing ARC and hard masks, which are essential to increase the efficiency of the subsequent processes. It has recently been focusing on developing a technology that alternately stacks a silicon oxide layer and a silicon nitride layer to make the thinfilm uniform.

Each team is again divided into the Process Part and the Equipment Part according to the nature of the tasks. The Process Part optimizes the process to ensure a stable deposition of thinfilm on the wafer. It also enhances distribution by analyzing the response data and defect data.

The Equipment Part is responsible for equipment maintenance and improving its performance. For instance, it manages the equipment use history, responds to defects in thinfilms, and has the equipment setup or relocated according to the work and production plans.

Technology Innovation Team works on utilizing a variety of data collected from the equipment at each FAB for equipment stabilization while Distribution Enhancement Team is in charge of improving the process distribution at each FAB. These two teams support the teams located in each FAB and contribute to improving the yield.

Although the teams are divided by process, they share the same goal: “achieving technological innovation to secure the best mass production technology.” In doing so, they are constantly communicating with each other and improving the process technology.

Here are some pointers that our engineers want to give you.

Our newsroom met with the junior members of the Thinfilm Technology Department to hear about the competencies and qualities required for their work.

Hyun-do Kim, Technical Leader at Cheongju NAND M11 PVD Technology Team

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Q. Please tell us about your job.
I’m a process engineer at Cheongju NAND M11 PVD Technology Team, working on improving the quality of thinfilm. I monitor the entire PVD process of my team to check any issue arising from the in-line (a continuous sequence of operations in the production line). When there is a defect, I analyze the response data and defect data to determine the cause and improve the distribution.

Q. Could you introduce some competencies your job requires?
You have to have a good understanding of PVD technology. It will be helpful to study the properties of semiconductor materials and the principles of physics in the state of vacuum. Also, it is important to make yourself familiar with statistics, especially how to use the tools and interpret the processed data, because we use big data in semiconductor manufacturing.

Q. What challenges have you encountered and how did you overcome?
I find it most challenging when the production quantity and quality issues come in conflict because when we increase production excessively, quality issues arise. To address this challenge, we increase production based on other FABs’ backup evaluations and production increase experiments. We also manage data carefully to prevent any quality issue. Moreover, we are trying to find new data to use for defect analysis.

Q. What are the fascinating aspects of your work?
I love communicating constantly with my team members or other teams to find the cause of the problem when a problem occurs.

Q. What’s the atmosphere of the team like?
We freely express and share our opinions. Whenever we need help, we work together and openly share our thoughts. This process allows us to broaden our perspectives and grow.

Q. What skills are required to complete the work done by your team? What would you say to those who wish to join your team?
A sense of responsibility and attention to details. Due to the nature of our work that deals with thinfilm, there are higher risk of accidents. So, it is important to be detail-oriented and take ownership until the end. Also, those who can communicate well with others are a great fit for our team because we collaborate a lot both within the team and with other teams.

Min-ho Kim, Technical Leader at Cheongju NAND M11 PVD Technology Team

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Q. Please tell us about your job.
Part of Cheongju NAND M11 PVD Technology Team, I’m in charge of the equipment that controls titanium (Ti) and titanium nitride (TiN) gases used in the PVD process. My job is project management (PM), which involves equipment operation and work management according to the production volume. When a defect is found in a wafer, I work with process engineers to resolve the problem.

Q. Could you introduce some competencies your job requires?
Semiconductor equipment handles different conditions, such as power, temperature, pressure, and flow, which are applied according to each situation. Therefore, you should be able to take an approach based on extensive knowledge. It is very helpful to build up basic knowledge from major courses in college. Another competency that will help you with this job is competency in data analysis so that you will be able to process the information obtained through parameters monitored in various sensors, such as the equipment’s temperature and pressure, into significant data.

Q. What challenges have you encountered and how did you overcome?
You work with many people as you operate the equipment and solve problems. When a problem occurs in a line, smooth communication between the site and the office is key to taking appropriate measures for the situation. The company offers opportunities for the employees to learn more about semiconductor and important information for different situations, such as SK hynix University (SKHU) classes and Thursday Class organized by Manufacturing & Technology Department every Thursday.

Q. What are the fascinating aspects of your work?
It feels great when I solved a difficult problem by developing a new hypothesis. When an issue arises from wafers during a process, we cannot check the inside of the chamber. Therefore, we have to come up with different hypotheses based on the grounds observed. The process is not easy, but when we find the solution, it becomes the most exciting moment.

Q. What’s the atmosphere of the team like?
PVD Technology Team consists of open-minded people who respect others’ opinions. Such environment has allowed me to develop flexible thinking in doing my job, and it improved my work efficiency as well.

Q. What skills are required to complete the work done by your team? What would you say to those who wish to join your team?
The number one skill, I would say, is flexible thinking. As semiconductor products become more sophisticated, there are times when existing methods are not enough to address an issue. In that case, rigid ways of thinking cannot solve difficult problems; rather, you have to come up with a new hypothesis from the beginning. To future members who will join PVD Technology Team, I recommend that you think of this process as an opportunity to learn something new every day, build your knowledge, and become an expert, rather than as a hard process.

Seung-uk Sim, Technical Leader at Cheongju NAND M11 CVD Technology Team

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Q. Please tell us about your job.
I work as a process engineer at Cheongju NAND M11 CVD Technology Team. I manage the process history according to the manufacturing plan and check the interlock³. Another important task is to set up the process in collaboration with related teams when next-generation products are developed or new equipment is transferred.

Q. Could you introduce some competencies your job requires?
The meticulous ability to accurately analyze significant differences in data between equipment is essential. This is because a uniform deposition of thinfilm without physical differences between equipment is indispensable for yield improvement. To this end, you should have the analytical power to quickly share with the team the results collected after deposition.

Q. What challenges have you encountered and how did you overcome?
The biggest challenge for me is when it is hard to find the exact cause of a problem in the process. We work closely with the teams in charge of other processes before and after deposition. We take advantage of the SK hynix Big Data Analysis System to identify the problem and implement the interlock to prevent the same issue from reoccurring.

Q. What are the fascinating aspects of your work?
I love about being able to work with others and achieve something that cannot be done by myself. Due to the nature of my job, I get to collaborate with related teams using output values. Whenever that happens, I get to learn about other processes and solve problems, so it’s like having my cake and eating it, too.

Q. What’s the atmosphere of the team like?
The image of the semiconductor manufacturing industry seen from the outside is “rigid”. However, CVD Technology Team is a flat organization that welcomes fresh ideas from new members.

Q. What skills are required to complete the work done by your team? What would you say to those who wish to join your team?
As long as you are passionate about solving problems and not afraid of challenges, you can overcome any difficulties after joining the company. In particular, Thinfilm Technology Department offers a well-structured training program for the newcomers, so you will be able to see yourself grow in the team.

Tae-wook Cho, Technical Leader at Cheongju NAND M11 CVD Technology Team

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Q. Please tell us about your job.
I work at the Equipment Part at Cheongju NAND M11 CVD Technology Team. I establish PM plans for the stable operation of mass production equipment, and I also set up new equipment or transfer surplus equipment. I am also responsible for reviewing issues arising from the equipment and resolving the problems in collaboration with related teams.

Q. Could you introduce some competencies your job requires?
Being detail-oriented is important to work in the Equipment Part. Some problems occur in the equipment because a very minor detail has not been properly addressed. It is necessary to check the equipment and its operation meticulously to prevent this from happening.

Q. What challenges have you encountered and how did you overcome?
Not only does it take a lot of time and manpower to solve a chronic problem of a piece of equipment, but it is also difficult to define the cause even after solving the problem. That is why I manage the equipment history and data constantly and prioritize different problem-solving approaches. I also go into the production line to see and touch the equipment myself to improve it.

Q. What are the fascinating aspects of your work?
I once worked on setting up new equipment in a FAB. I basically had to prepare every single piece of equipment for the FAB and it felt like I was making something out of nothing. I felt proud to see the equipment contributing to production.

Q. What’s the atmosphere of the team like?
Since the company introduced a flextime system, individuals have been given more autonomy at work. We can work flexibly under certain standards, which has helped us improve our work-life balance.

Q. What skills are required to complete the work done by your team? What would you say to those who wish to join your team?
I would suggest they show that they are hard-working people who are also willing to learn. All the efforts and experiences you have made to join our company will pay off and form the basis of your work at SK hynix. Be confident and believe in yourself.

¹Reactive ion etching (RIE): It is part of the metallization process, which “creates a path for electricity.” In this method, aluminum (AI) films are first deposited, followed by the photo process and some AI etching, Then, non-metallic films of silicon dioxide (SiO2) are deposited.
²Damascene: It is part of the metallization process. Non-metallic films of silicon dioxide (SiO2) are deposited, followed by the photo and etching processes to create patterns. Then, metal films are deposited inside, followed by the chemical mechanical polish (CMP) process, thereby creating independent metal lines.
³Interlock: A system that shuts down the equipment when any of the optimized process criteria is not met. The shutdown continues until all the criteria are met. Its purpose is to minimize product defects.

The post People Who Put a Uniform “Drawing Paper” on a Wafer: Thinfilm Technology first appeared on SK hynix Newsroom.

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Hundreds of processes take place when making wafers into semiconductors. Among them, one of the most essential is etching. This process sees micro-patterns carved onto wafers by shaping circuits. For a successful etching process, it is important to manage the various variables within a set distribution and prepare each piece of equipment to operate in optimal condition. Our etch process engineers operate the manufacturing technology that handles this detailed work.

The SK hynix Newsroom team spoke with employees from the Icheon DRAM Front Etch, Middle Etch, and End Etch technology teams to learn more about their work.

Etching: Journey to Productivity Improvement

In semiconductor manufacturing, etching refers to engraving patterns on the film. The patterns are coated with plasma to make the final profile for each step of process. Its primary purpose is to accurately implement exact forms according to the layout, keeping results uniform and consistent under any conditions.

If a problem occurs during the deposition or photo processes, the problem area can be removed through selective etching. Alternatively, once something in the etching process goes wrong—it cannot be reversed. This is because it is impossible to refill the same material in the carved area. Therefore, etching is crucial in semiconductor manufacturing to determine the overall yield rate and product quality.

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The etching process is comprised of eight steps: ISO, BG, BLC, GBL, SNC, M0, SN, and MLM.

First, the silicon (Si) of the wafer is etched in the ISO (Isolation) stage and the active region of the cell is created. During the BG (Buried Gate) step, the word line¹ and gate are formed to make a channel for electrons. Next, connections between the ISO and bit line² are created in the cell region during the BLC (Bit Line Contact) process. The bit line of the cell is created simultaneously with the gate in peri³ during GBL (Peri Gate + Cell Bit Line) process.

In the SNC (Storage Node Contact) phase, work to build connections between the active region and the storage node⁴ proceeds. Later, the connection point of S/D (Source/Drain)⁵ in peri, and between the bit line and storage node, is formed in the M0 (Metal 0) step. The whole process is complete once the capacity of the cell is confirmed in the SN (Storage Node) stage and the external power and internal wiring are created during MLM (Multi-layer Metal) phase.

As etch technologists are responsible for patterning semiconductors, the department is divided into three teams: Front Etch (ISO, BG, BLC), Middle Etch (GBL, SNC, M0), and End Etch (SN, MLM). The teams are also divided into manufacturing and equipment roles.

The responsibility of manufacturing roles is to manage and improve the unit production process. Manufacturing roles are essential for increasing the yield rate and improving product quality through variable control and other production optimizations.

Whereas equipment roles manage and enhance production equipment to avoid errors during the etching process. The core responsibility of equipment roles is to ensure the best performance of machinery.

Although separated by responsibility, all teams have the same objective—managing and improving the production process and relevant equipment to enhance productivity. To achieve the goal, each team shares their results and points of improvement, collaborating for better business performance.

How to Solve the Challenges in Miniaturization

SK hynix began mass production of 1anm 8Gbit LPDDR4 DRAM using EUV equipment in July 2021

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Semiconductor memory’s circuit patterns have reached a level of 1anm and have been refined to accommodate approximately 10,000 cells in a single DRAM. As a result, the process margin proves insufficient even in the etching process.

When the hole⁶ is formed too small, a “not open” status can occur which blocks the lower portion of the chip. Alternatively, “bridge” phenomenon can become a problem when the hole is too large. “Bridge” phenomenon occurs when the gap between two holes is insufficient, and thus, they stick to each other in subsequent steps. As semiconductors become finer, the possible values of holes able to avoid these risks narrows gradually.

To solve this problem, etch technologists are continuing to make improvements including modifying the process recipe and APC⁷ algorithms as well as introducing new etch technologies like ADCC⁸ and LSR⁹.

Another challenge emerging, as customer needs become more diverse, is the trend of multi-product production. To meet such requirements, optimized process conditions for each product should be set separately. This presents a unique challenge as engineers must secure mass production technology that satisfies both prepared conditions and diverse ones.

For this, etch engineers introduced an “APC offset” ¹⁰ technique to manage various derivatives based on the core product, while building and utilizing a “T-index System” to manage products in an integrated way. These efforts are improving the system to suit multi-product production.

Let’s hear from our Etch Process Engineers.

What skills are required to complete the work done by your team?

Hana Kim, Technical Leader (TL)

I’m in charge of evaluating the work to improve dispersion as well as increase yield and productivity based on measured data by production engineers. Since etching is carried out with a hard-mask¹¹ made through various linkage processes, meticulous and accurate analysis is required. The final pattern must be determined in the etching process, therefore it is important to respond quickly when changes occur in linkage processes. Accurate analysis of data related to the overall understanding of semiconductor production is key to forming a complete pattern.

Taehee Yoo, Technical Leader (TL)

As an equipment engineer, I’m in charge of the maintenance, repair, set-up, and removal of equipment. The most important job of an equipment engineer is maintaining equipment so production can proceed under optimal conditions. It would be nice if machines always operated consistently, but their condition changes from time to time based on numerous variables. Therefore, it is necessary to have a broad perspective and to be able to assess problems from multiple angles.

How do you continue to develop your expertise?

Minho Kim, Technical Leader (TL)

Being familiar with the latest technologies is important—but these days, so is data utilization. It’s necessary to find correlations between data points like equipment data generated during production and response data that appears as a result. So, I’m studying statistical theories to use in analysis.

Louis Lee, Technical Leader (TL)

Considering the nature of technical manufacturing work, stable production is considered a job well done. So, I check everything carefully. Since process technology and equipment technology are mutually compatible, you need to understand the production process but also have an overall knowledge of the equipment. Therefore, I keep studying equipment-related content during my spare time. Our team offers opportunities to rotate between process and equipment roles to help members increase their knowledge of both disciplines.

What do you find rewarding about your work?

Hana Kim, Technical Leader (TL)

It is rewarding when the yield rate is enhanced through changes in production conditions. Although I’m proud that etching is a core step which directly connects to yield rate, I sometimes feel pressured by the thought that even small mistakes can be critical to the yield. I guess that’s why it feels rewarding to safely hand over a quality wafer to the next step in production.

Louis Lee, Technical Leader (TL)

The etching process is sometimes referred to as the pinnacle of semiconductor production, as it often determines the yield rate. Therefore, I find solving each and every task rewarding. That is the charm of this work, feeling rewarded when I break through difficulties and solve problems. I also feel the same amount of pride when I positively influence other coworkers by sharing an improvement to the process.

How about the overall work atmosphere in your team and group?

Taehee Yoo, Technical Leader (TL)

We are all proud to be on this team as etching is complicated and accounts for a large part of the entire semiconductor manufacturing process. Everyone is dedicated to their work which creates a dynamic and lively atmosphere. This sort of positive workplace stems from the fact that our team values enjoying our personal time too—so naturally our work-life balance is great.

Minho Kim, Technical Leader (TL)

We have a horizontal company culture, so everyone can actively express their opinions. Of course, when it comes to the work, it’s intense, but our team atmosphere is all about caring and having respect for each other. The FAB operates 24/7, so the scope of work we’re responsible for is broad. This means sometimes our work-life balance can take a back seat, but because we genuinely respect each other and communicate well as a team, people go the extra mile to help each other keep a good balance.

¹Word Line: a line, connected to the source portion of a transistor, responsible for reading and writing.
²Bit Line: a line passing though the transistor gate. When a voltage above a certain level is applied to the line, the transistor is turned on and is ready to read or write data.
³Peri: a peripheral circuit that controls cell operation.
⁴Storage Node: the sector managing data storage in DRAM, especially the lower electrode of the dielectric for data storage
⁵S/D (Source/Drain): source to emit electrons and drain to receive electrons.
⁶Hole: the level of empty electrons generated by the movement of electrons in a valence band.
⁷Advanced Process Control: a program that automatically adjusts variables per production according to a set calculation.
⁸ADCC (Active DC Control): a function to control the interrelationship determined by the RF Time through varying DC controller.
⁹LSR (Lam Spectral Reflectometer): a method to adjust the etching amount by calculating and estimating etching depth based on the reflection angle of light shot at the center of wafer.
¹⁰APC Offset: an automatic program to follow variables with a certain standard based on response performance for each product focusing on a certain product (usually a core product).
¹¹Hard-mask: a material with high etching selectivity used before depositing photoresist as it is hard to exclusively etch the lower part with insufficient margin provided by photoresist alone.

The post Details, Defined: A Look at Etch Technology first appeared on SK hynix Newsroom.

An introduction to the role of semiconductors in today’s global commerce ecosystem that relies heavily on a vast number of devices, interactions, experiences and databases to keep business running

The post A Day in the Life: Semiconductor Technology’s Impact on E-commerce first appeared on SK hynix Newsroom.

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SK hynix established the new Revolutionary Technology Center (RTC) under its Research & Development early this year to secure a competitive advantage in future semiconductor technology. The decision reflects the company’s commitment to ensuring innovative technology that will set forth a new paradigm in the semiconductor industry with a mid-to-long-term perspective, instead of being complacent in maintaining its current dominant position in technology.

Newsroom sat down with RTC leaders to listen to the vision they have for the ‘innovation’. We also asked them what capabilities and skills are required to work for the team for future talents wanting to find a position in the field of technology at SK hynix.

Securing Next Generation Semiconductor Memory and Core Technologies in accordance with Changes in Computing Environment

The semiconductor memory industry is facing a few challenges. The competition for scaling for both DRAM and NAND is intensifying, and securing advanced leading technology has become more important than ever before. Some experts forecast that a limit in scaling is just around the corner.

An inflection point in the field of computing systems that use semiconductor memory is also nearing. The semiconductor industry has recently begun to explore Post von Neumann computing, moving beyond the current von Neumann architecture where semiconductor memory is are dependent on processors.

New concept of computing methods such as heterogeneous computing¹ and neuromorphic computing² has recently been raised as alternatives, while research on the next-generation memories such as PCM³ and MRAM⁴ is increasingly active. In addition, many are turning their attention to the chips that converge semiconductor memory such as PNM5), PIM6), CIM7) with logic unit in various forms.

RTC is responsible for securing future competitiveness for SK hynix through technology innovation in response to the rapidly changing environment of the semiconductor industry. It primarily focuses on gaining necessary core technologies needed to overcome the limits of scaling DRAM and NAND. RTC also takes on the role of securing a new-type memory that can create new values in the next-generation technology phase. RTC is also dedicated to predicting the next-generation computing method and ensuring a new concept semiconductor technology preemptively in accordance with such forecasts.

RTC Myung Hee Na

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Myung Hee Na, the head of RTC said, “A possible change in the computing method doesn’t necessarily mean a change for the entire frame of the semiconductor industry, so ensuring future continuity of DRAM and NAND is critical,” emphasizing the RTC’s role of finding innovative and groundbreaking ways to do so.

She explained that RTC is especially focused on neuromorphic computing among the various post von Neumann computing and is making great efforts to ensure the appropriate semiconductor memory  technology.

To this end, RTC integrated New Memory Technology Development (NM TD), which creates new values by developing the next-generation memories, and New Architecture Research (NAR), which analyzes future technology trends and studies semiconductor technology that fits the next generation computing system, under one organizational roof.

NM TD is focused on developing the next-generation memory technology and commercializing the technology to enable mass production to prepare for the next 2 to 3 years. The organization is also responsible for identifying technology trends for the next 5 to 10 years and exploring and securing core technologies that will enable new innovations for the next-generation source of revenue.

NAR has a longer-term perspective and oversees preemptively various advanced technologies to explore and verify necessary ‘candidate technologies’ to innovate future semiconductor technology. To this end, it focuses on studying the principles of technologies and tests feasibility as well as conducting various verification processes such as leveraging its own resources to carry out actual development.

Innovation to Remain Global Technology Leader Status

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Q. What are the objectives of RTC?

RTC aims to take on a more long-term perspective into the future beyond just the next 5 years or 10 years and continue innovation for the next 30 years to help SK hynix remain a technology leader. That comes down to two specific goals; achieving technological innovation that can deliver impact on the market and expanding the influence SK hynix has on memory semiconductor R&D to solidify its status as a global technology leader in the overall semiconductor industry.

Q. What are the strategies to achieve this goal?

The first thing we’d have to do is to realize the next generation of the semiconductor memory that can exceed the technological inflection point and expand the current value of DRAM and NAND. Second, we are focused on exploring the various alternatives in the industry in response to the blurring boundaries of the roles of Cache, DRAM, and NAND, and developing a new type of semiconductor that can create new value. Lastly, we are looking into ways for semiconductor memory to take on more diverse roles in the post-von-Neumann era, rather than being restricted to the role of storing and processing data as part of the logic unit.

Q. What mindset do you emphasize to team members to carry out RTC tasks well?

The most important thing is to have an open mind. Wanting to learn more is an important mindset. That’s because there is no guarantee that today’s technology will exist tomorrow, and the only constant is that technology always changes. We shouldn’t be afraid of change. Many times, we find ourselves confused and struggling to find a direction given due to the nature of R&D, which requires us to find something that does not exist, something that is completely new. It is the path untaken. So, we must be open to new things. We also need to be able to take risks and be unafraid of failure.

Q. Please share a few words to those who may join RTC in the future.

You normally don’t see the outcome or accomplishments of the R&D immediately. But it has a great advantage; you can lead big changes over the longer term and a sense of pride of shaping the future with our own hands. Above all, I believe RTC is an organization that builds dreams. It would be a lie if I say the work we do is not tough,  but one thing I can say for sure is that you will enjoy working at RTC even though it’s challenging. I want to ask those of you, who dream of a future developing new technologies for a better world, to dream of a future working at RTC.

Curiosity and Spirit of Challenge for New Field

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Q. What are the roles of your teams under RTC? Please share what you do in each of your teams as well.

Jung-won Seo PL (or Seo): I am currently the head of PCM PJT team under NM TD overseeing Process Integration (PI). The team is responsible for actual commercialization of semiconductors that will lead future of SK hynix, beyond securing future technology. I oversee the next-generation semiconductor memory, with a special focus on the development and production of PCM.

Hyejung Choi PL (or Choi): I oversee the Advanced Technology Team under NM TD. If PCM PJT team is responsible for development to commercialize PCM, my team is in charge of securing core technologies necessary to develop the next-generation PCM semiconductor memory technology with a perspective of looking into the next 10 years. We study what form of semiconductor memory will be needed in 10 years and look at materials or operation principle, developing the necessary technologies to achieve this.

Joong-sik Kim TL (or Kim): I lead Pathfinding in the Future Memory Research Team under NAR. The team explores and studies what types of technologies we will need to prepare for the changes of the environment around memory systems with a long-term perspective. Our goal is to secure a future technology pool that has the potential to be used in next generation semiconductor memory development. We conduct in-depth research into various technologies, while also conducting our own research or testing technologies.

Q. What are the capabilities or qualifications that your team requires?

Seo: Because we make actual products, we must have the knowledge and understanding of the production process. We must also be able to analyze issues that occur during the process and provide solutions. Being able to work with others and communication skills are a must because we also collaborate with various relevant teams such as process or design throughout the entire development process.

Choi: Securing future technology requires a strong focus and patience in a certain area because it is a long-term project. The scope of work is also quite comprehensive. We deal with broad range of areas from semiconductor memory elements to processing units and computing systems, meaning that there is a lot to understand or apply. Due to the nature of our work, having curiosity in multiple aspects is helpful.

Kim: Our work is about exploring new technologies, so, you should be aggressive and frequently make challenges. We must catch up with new technologies across various fields, so you should be a fast learner. You also need to collaborate with other global research institutes on various studies, so language skills and the ability to build network are essential.

Q. Please share a few words to those who may join your teams in the future.

Seo: I took part in interviewing candidates for new recruits, and I felt that the candidates lacked confidence when introducing themselves. I understand that interviews are challenging and can make you nervous, but it is also a great opportunity to demonstrate confidence along with your strengths and potential. I also encourage newcomers to become an energetic person. If you have an energetic mind, you will adjust well at SK hynix. Cheers, you’ll do great.

Choi: It is more important to have a mindset of wanting to do well at work rather than having outstanding capabilities. RTC is an organization that works on new technologies to be used in the distant future among the future technologies known today. I look forward to working with someone full of hope for the semiconductor industry.

Kim: Few has all the capabilities and skills I mentioned above from the first place. If you are not afraid of making new challenges, you will eventually be able to work with others, learn, and thrive. We have great colleagues and a wonderful system. Please join us in the amazing journey of preparing for the future.

¹Heterogeneous computing: A computing system that combines cores like CPUs or GPUs, which separately handled different roles until now.
²Neuromorphic computing: A computing system that imitates data processing of the human brain, changing the current computing structure of the series connection between logic unit and memory semiconductor into a parallel computing mode like the data processing between neurons and synapse.
³PCM: Phase-change memory. A memory semiconductor that stores data using the changes of phase in a certain material. It has both the advantage of a flash memory where you don’t lose data when power is turned off and the advantage of DRAM’s fast processing speed.
⁴MRAM: Magnetic random-access memory. A non-volatile memory that stores data using magnetic resistance. It has the advantage of being non-volatile like a flash memory, meaning you don’t lose data even when the power is turned off, and the advantage of RAM’s fast processing speed and low power consumption.
⁵PNM: Process near memory. A convergence-type semiconductor that has a memory semiconductor and logic unit for each module.
⁶PIM: Processing in memory. A convergence-type semiconductor that has a memory semiconductor and logic unit for each package.
⁷CIM: Computing in memory. A convergence-type semiconductor that combines memory semiconductor and logic unit within one die.

The post Preparing SK hynix’s Tomorrow with Future Semiconductor Technology_RTC Team first appeared on SK hynix Newsroom.

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The semiconductor industry enables and supports all aspects of modern life. Semiconductor products provide the processing for data centers, the network edge and in embedded industrial and consumer devices. It also provides fast network communication required for data centers and connected devices. Semiconductor memory/storage products such as DRAM and NAND flash provide the memory and long-term storage of information required to support data processing and to keep the results of that processing available for future access.

Vehicles are becoming mobile computers with semiconductors ensuring efficient operation, ADAS and autonomous driving services as well as infotainment. Embedded connected electronics control factory operations and enable smart cities. They are an essential element in Internet of Things (IoT) applications, including wearable devices that help us stay connected and provide ways to monitor our health and motivate us to stay healthy.

Let’s take a look at how the semiconductor industry works, the impact of the COVID-19 pandemic on the industry and how the increasing capabilities of semiconductor devices will enable an amazing array of products and services that will allow us to work more effectively, manufacture products more efficiently, keep us healthier and entertain us in more engaging and immersive ways.

Big Breakthroughs for Smaller Tech

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The semiconductor industry creates small electronic devices (chips) that can be incorporated into various products. These chips use electric energy to process data, control operations, encrypt and decrypt data and store data temporarily or long term.

Semiconductors are made on mostly silicon wafers in large factories and using sophisticated and expensive equipment. For instance, a modern 3D NAND flash fab costs more than $10B to equip and build, and if it is a brand-new plant, may take a year and a half to come online with high production volumes. The equipment required for a semiconductor fab depends upon what sort of wafers are being processed.

Some semiconductor companies, such as SK hynix, make all or most of their own wafers and chips. Many other semiconductor companies own no semiconductor fabs and instead have their chips manufactured in large semiconductor foundries. These companies are called fabless semiconductor companies. There are several large semiconductor foundry companies in various parts of the world that service these fabless companies.

Semiconductor development is following what has been known as Moore’s Law, named after Gordon Moore, one of the founders of Intel. This “law”, which is a projection of a historical trend first observed in the 1960’s, said that the number of transistors on semiconductor integrated circuits (ICs or chips) doubles about every two years. This doubling of circuit density was accompanied by various other scaling trends, increasing the performance and lowering the power required by the ICs as well.

Moore’s Law has become more difficult to sustain in recent years as the size of the features that make up a transistor have shrunk. The equipment to manufacture these small features has also increased significantly in price. Currently semiconductor devices are available in volume at down to 7nm minimum feature sizes with 5nm planned and work underway for 2nm and less.

But, because of the cost to make these small features, new ways to design chips have emerged. For instance, some companies are breaking up the capabilities that might have been built into a single chip using one lithographic node into multiple chips with different minimum lithographic feature requirements, called chiplets. These chiplets are located next to each other in a chip module. Another approach is to stack and connect wafers on top of each other that may differ in their lithographic processes and even their particular operations (e.g. CPUs, memory and specialized processing for particular tasks).

With these new approaches for semiconductor devices, chips with larger lithographic features can be used for many functions, focusing the more expensive small features processes where they do the most good and avoiding the expense of converting all the semiconductor operations to the smaller lithographic node.

The Pandemic-Induced Shortage Felt Around the World

With the COVID-19 pandemic in 2020, many semiconductor fabs went idle for a time and the semiconductor supply chain was temporarily disrupted. At the same time global demand for mobile devices, PCs and data center equipment surged in response to online learning, remote work and other activities.

Also, during the pandemic, some industries, such as the automotive industry, cut back on their orders for chips, anticipating weaker demand. Semiconductor companies responded by allocating more output to semiconductors for other applications. As the pandemic has eased with the introduction of vaccines, demand for products such as automobiles has increased, but many semiconductor companies don’t have additional capacity to meet this demand. Because of the time it takes to bring new semiconductor capacity online, several semiconductor companies have said that it could take a couple of years for capacity to meet demand.

Leveraging New Technologies, Broadening Markets

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In addition to semiconductor shortages for products like automobiles, the overall demand for semiconductors is increasing to provide advanced cloud services, wireless networks (such as 5G and WiFi6) and to support the application of artificial intelligence (AI) at the network edge and in industrial, civic and consumer endpoint devices.

5G smartphones may use $25 worth of chips compared to $18 in 4G and $8 in 3G phones. Nearly three-quarters of all cars will likely ship with cellular connectivity by 2024 and the cost of electronic components in cars was about 45% of the total car cost in 2020, up from 20% in 2000¹.

Semiconductors and wireless connectivity are enabling new wearable and embedded devices that will help us stay healthy. They will also power a new generation of robots used in human/robot manufacturing teams and for home health care and companionship.

In addition to computing, communication, healthcare and transportation, entertainment systems use lots of chips. With the introduction of high dynamic range 8K video, virtual and augmented reality and even more advanced immersive audio-video technologies, demand for semiconductors to produce, process and deliver this content will soar.

Semiconductors will help the unconnected have access to the Internet and a better life, create safer transportation and cities, make our factories more efficient, keep us healthier and entertain and educate us in new ways.

¹https://www.fool.com/investing/2021/04/27/6-causes-of-the-global-semiconductor-shortage/

The post Global Trends, Semiconductors, and Evolving Market Demands first appeared on SK hynix Newsroom.

Today, even transactions conducted in-person and paid in cash have some element of technology built into them. Behind the scenes, technology is powering everything from inventory management systems to mobile phones being used as payment devices to the security systems built into the online checkout process.

And at the heart of every one of those technologies is a semiconductor that enables the many components to work together behind the scenes so that retailers can customize their online experiences for individual customers, customers can safely store credit card information online or suppliers automatically know when to restock shelves.

Today’s global commerce ecosystem relies on a vast number of devices, interactions, experiences and databases to keep business flowing. Consider the impact that technology has on some critical parts of the commerce experience, such as the following:

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Inventory management systems: Not just for vendors who are stocking shelves but for everyone else along the supply chain, as well – from manufacturers to transporters to distributors. All this data stored and often updated in real-time continually contributes to the era of big data that is upon us.

According to data company Adeptia1, Amazon, as the world’s largest e-commerce site, hosts an estimated 1 billion gigabytes of data across more than 1.4 million servers. Semiconductors play a vital role in managing big data for these companies by processing data, helping to extract relevant information quickly, providing real-time insights, and ultimately determining demand for the future.

Personalization: Online retailers know that consumers want a personalized experience when it comes time to shop. Artificial Intelligence and Machine Learning technologies not only track buying history but also shopping behaviors, product preferences and promotion engagement – but they need the technology to process that data in real time.

Semiconductors can have a great impact on AI’s expanded capabilities on two fronts, according to research by McKinsey & Company2. The first is to work with partners to develop AI hardware that’s specific to industry use cases, such as retail. The second is to focus on developing AI hardware that enables broad, cross-industry adoption. Consider how some industries – from self-driving cars to advanced healthcare – both have a need for AI solutions but under different circumstances and scenarios.

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Chatbots: Think of them as the online version of salespeople who might approach you in a store and ask if you’re finding everything you need. The pop-up chatbot, originally considered an annoyance of sorts, has evolved to better understand language and tone and engage with customers.

But as the technology stack continues to evolve and power advanced machine learning and artificial intelligence capabilities, those same customer interaction experiences are shifting from less “chatbot” to more “conversational AI.” Now, instead of just understanding the question and providing a best-guess automated reply, which was sufficient for some engagements, the bot can also recognize tone of voice, volume and other cues that might suggest the need for human intervention.

It’s in those critical moments before potential customers become lost customers that the ability of back-end technology to process that data to enable real-time decisions can become table stakes for some types of businesses.

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Devices: Today, we have several ways to conduct digital transactions. We can shop from a browser on a PC, through an app on a mobile phone or tablet or from a connected kiosk. We can pay with any number of credit cards, through an online payment system such as Venmo or PayPal or a digital wallet built into a smartphone. And let’s not forget that there are different browsers and different versions of mobile devices that all require compatibility.

This type of connected network is referred to as the Internet of Things and semiconductors are used across these key devices and allow for this IoT technology no matter the device, from PC to mobile. Companies are innately aware of their benefit and according to Deloitte3, IoT semiconductor spending surpassed $33 billion by the end of 2020 and a projected $80 billion by 2025.

While some consumers and retailers had been slower to embrace e-commerce, the global COVID-19 pandemic changed the dynamic substantially. Online consumer spending in the U.S. was up 44 percent year-over-year in 2020, according to research firm Digital Commerce 360.

While it’s unclear whether online sales will dip as the pandemic concerns subside, it doesn’t change much as it relates to the impact of technology on the larger commerce ecosystem. Whether in-person or online, the technology that powers e-commerce behind the scenes plays an important role in every transaction, no matter whether it involves a virtual credit card number in a mobile app or handing over cash in exchange for a product.

¹“The Surprisingly Things You Don’t Know About Big Data,” Adeptia, March 2015
²“Artificial-Intelligence hardware: New opportunities for semiconductor companies,” McKinsey & Company, January 2019
³“IoT opportunity in the world of semiconductor companies,” Deloitte, July 2018

The post A Day in the Life: Semiconductor Technology’s Impact on E-commerce first appeared on SK hynix Newsroom.