¹Open Innovation Platform (OIP): A comprehensive design technology infrastructure encompassing all areas of integrated circuit implementation which aims to promote innovation. Members include a variety of semiconductor design and manufacturing companies.
²High Bandwidth Memory (HBM): A high-value, high-performance product that revolutionizes data processing speeds by connecting multiple DRAM chips with through-silicon via (TSV).

SK hynix’s booth at the TSMC OIP Ecosystem Forum 2024

Innovation in Focus: Leading HBM, AI & Data Center Products at the Booth

Situated next to the main TSMC booth, the SK hynix booth featured two main sections which showcased the company’s global No. 1 HBM and AI/data center solutions, respectively.

The HBM section featured the company’s industry-leading HBM3E. Boasting rapid processing speeds, high capacity, and outstanding heat dissipation, HBM3E is optimized for AI applications. This section not only highlighted the technological achievements of SK hynix, but also illustrated the strategic importance of its collaboration with TSMC to push the boundaries of AI innovation. Moreover, SK hynix’s HBM leadership was further underlined by the company’s recent announcement that it had become the first in the industry to begin volume production of the 12-layer HBM3E.

In the AI and data center solutions section, SK hynix presented the industry’s first 16Gb DDR5 product built using the 1c node, the sixth generation of the 10 nm process. Compared to the previous generation, the new product offers 11% faster operating speeds of 8 gigabits per second (Gbps) and 9% greater power efficiency to help data centers cut electricity costs. Marking a significant advancement in DRAM scaling, the 1cnm technology is set to be applied to other SK hynix products in the future.

This section also featured other key products in SK hynix’s portfolio, including DDR5 MCR DIMM³, DDR5 3DS RDIMM⁴, LPCAMM2⁵, GDDR7⁶, and LPDDR5T⁷. Each solution reflects significant advancements in AI memory technology, catering to diverse needs from high-performance computing (HPC) to mobile and graphics-intensive applications.

³Multiplexer Combined Ranks Dual In-line Memory Module (MCR DIMM): A module product with multiple DRAMs bonded to a motherboard in which two ranks—basic information processing units—operate simultaneously, resulting in improved speed.
⁴3D Stacked Memory Registered Dual In-line Memory Module (3DS RDIMM): A high-density memory module used in servers and other applications to vertically connect DRAM dies through TSV, reducing module package height and boosting data transfer speeds.
⁵Low Power Compression Attached Memory Module 2 (LPCAMM2): LPDDR5X-based module solution that offers power efficiency and high performance as well as space savings. It offers performance levels equivalent to two DDR5 SODIMMs, making it optimized for on-device AI.
⁶Graphics DDR (GDDR): A standard specification of graphics DRAM defined by the Joint Electron Device Engineering Council (JEDEC) and specialized for processing graphics more quickly. It is now one of the most popular memory chips for AI and big data applications.
⁷Low Power Double Data Rate 5 Turbo (LPDDR5T): Low-power DRAM for mobile devices, including smartphones and tablets, aimed at minimizing power consumption and featuring low voltage operation. LPDDR5T is an upgraded product of the 7th generation LPDDR5X and will be succeeded by the 8th generation LPDDR6.

Other products on display included DDR5 MCR DIMM, DDR5 3DS RDIMM, LPCAMM2, LPDDR5T, and GDDR7

Presentation on 2.5D SiP Study for Enhancing HBM Quality & Reliability

During the forum, SK hynix’s Byoungdo Lee, Technical Leader of HBM PKG TE, gave a talk titled “A Collaborative Study on 2.5D System-in-Packages for Better Quality and Reliability of HBM.” Having encountered limitations using a proxy package to accurately recreate SiP⁸ conditions for the study, SK hynix opted to conduct open collaboration with companies including TSMC. This collaboration included preliminary evaluations as well as thermal and mechanical simulations at the SiP level. The study found that HBM products with SK hynix’s MR-MUF⁹ technology offer greater quality and reliability, and are ultimately able to overcome stacking limitations.

Additionally, the presentation covered three main advancements for HBM4, the upcoming sixth generation of HBM. Lee addressed the use of base logic die wafers¹⁰ to improve performance and power efficiency, as well as the development of 16-layer HBM utilizing Advanced MR-MUF or hybrid bonding¹¹ packaging technology to meet demand for higher density products. Lastly, Lee spoke about planned SiP-level verification developments which aim to mitigate risks associated with the increased total product thickness.

⁸System-in-Package (SiP): A method of stacking and connecting multiple semiconductor chips in a single package to improve performance and efficiency, enabling advanced functions like high-speed data processing.
⁹Mass reflow-molded underfill (MR-MUF): A technology that ensures secure and reliable connections in densely stacked chip assemblies by melting the bumps between stacked chips.
¹⁰Base logic die wafer: A foundational semiconductor layer that contains the memory controller and logic circuitry, enabling high-speed communication between the stacked memory dies and the system.
¹¹Hybrid bonding: A technology that stacks two or more chips atop one another in the same package, enabling high-density interconnections crucial for advanced HBM products.

SK hynix’s Byoungdo Lee presenting an OIP Partner Technical Talk on enhancing HBM

Strengthening AI Memory Leadership & Strategic Partnerships

At the TSMC OIP Ecosystem Forum 2024, SK hynix underlined its AI memory leadership and strengthened key industry partnerships. By showcasing key products such as the industry-leading HBM3E and the world’s first 1cnm DDR5 product, the company emphasized its ability to break technological boundaries. Looking ahead, the company is set to continue advancing its portfolio through collaboration with global partners to meet the growing needs of the AI era.

The post SK hynix Spotlights AI Memory Solutions & Industry Collaboration at TSMC OIP Ecosystem Forum 2024 first appeared on SK hynix Newsroom.

SK hynix’s booth at the TSMC 2024 Technology Symposium

SK hynix showcased its next-generation technologies and strengthened key partnerships at the TSMC 2024 Technology Symposium held in Santa Clara, California on April 24. At the event, the company displayed its industry-leading HBM¹ AI memory solutions and highlighted its collaboration with TSMC involving the host’s CoWoS² advanced packaging technology.

¹High Bandwidth Memory (HBM): A high-value, high-performance product that revolutionizes data processing speeds by connecting multiple DRAM chips with through-silicon via (TSV).
²Chip on Wafer on Substrate (CoWoS): TSMC’s proprietary packaging technology to combine HBMs and GPUs. Unlike conventional packaging that connects different chips—such as memory and logic chips—on a substrate after they are packaged separately, CoWoS simultaneously packages the chips together on a silicon-based interposer. The area decreases as the distance between chips reduces, and the signal transmission speed increases as more wiring becomes possible.

HBM3E is the ideal memory solution for AI applications

TSMC, a global semiconductor foundry, invites its major partners to this annual conference in the first half of each year so they can share their new products and technologies. Attending the event under the slogan “Memory, the Power of AI,” SK hynix received significant attention for presenting the industry’s most powerful AI memory solution, HBM3E. The product has recently demonstrated industry-leading performance, achieving input/output (I/O) transfer speed of up to 10 gigabits per second (Gbps) in an AI system during a performance validation evaluation.

SK hynix also operated a collaboration zone with the host company to emphasize the importance of cooperating with TSMC in the area of CoWoS to solidify its HBM leadership. The display follows the two companies’ recent announcement that they will establish a closer and more innovative partnership to develop new technologies such as next-generation HBM products.

SK hynix displayed a range of leading solutions for the AI sector

In addition to its HBM solutions, SK hynix also displayed a range of its high-performance products that are set to supplement the AI industry. The lineup included CXL³ memory with an integrated interface, MCR DIMM⁴ and 3DS RDIMM⁵ memory modules for servers, LPCAMM2⁶ and LPDDR5T⁷ optimized for on-device AI, and the next-generation graphic DRAM GDDR7.

³Compute Express Link (CXL): A PCIe-based next-generation interconnect protocol on which high-performance computing systems are based.
⁴Multiplexer Combined Ranks Dual In-line Memory Module (MCR DIMM): A module product with multiple DRAMs bonded to a motherboard in which two ranks—basic information processing units—operate simultaneously, resulting in improved speed.
⁵3D Stacked Memory Registered Dual In-line Memory Module (3DS RDIMM): A high-density memory module used in servers and other applications to vertically connect DRAM dies through TSV, reducing module package height and boosting data transfer speeds.
⁶Low Power Compression Attached Memory Module 2 (LPCAMM2): LPDDR5X-based module solution that offers power efficiency and high performance as well as space savings. It has the performance effect of replacing two existing DDR5 SODIMMs with one LPCAMM2.
⁷Low Power Double Data Rate 5 Turbo (LPDDR5T): Low-power DRAM for mobile devices, including smartphones and tablets, aimed at minimizing power consumption and featuring low voltage operation. LPDDR5T is an upgraded product of the 7th generation LPDDR5X and will be succeeded by the 8th generation LPDDR6.

SK hynix’s Unoh Kwon and Jaesik Lee presenting at a workshop

In a workshop held two days before the TSMC 2024 Technology Symposium, Head of HBM PI Unoh Kwon and Head of Package Engineering Jaesik Lee presented their talk titled “HBM and Heterogeneous Integrated Technology.” As seen through its active participation in the symposium, SK hynix plans to strengthen its AI memory competitiveness by advancing its partnerships in various areas including technology, business, and trends.

The post SK hynix Strengthens AI Memory Leadership & Partnership With Host at the TSMC 2024 Tech Symposium first appeared on SK hynix Newsroom.

• SK hynix and TSMC sign MOU to collaborate on HBM4 development and next-generation packaging technology
• SK hynix will adopt TSMC’s cutting-edge foundry process to advance HBM4 performance
• Product Design-Foundry-Memory trilateral collaboration to break memory performance limits for AI applications

Seoul, April 19, 2024

SK hynix Inc. (or “the company”, www.skhynix.com) announced today that it has recently signed a memorandum of understanding with TSMC for collaboration to produce next-generation HBM and enhance logic and HBM integration through advanced packaging technology. The company plans to proceed with the development of HBM4, or the sixth generation of the HBM family, slated to be mass produced from 2026, through this initiative.

SK hynix said the collaboration between the global leader in the AI memory space and TSMC, a top global logic foundry, will lead to more innovations in HBM technology. The collaboration is also expected to enable breakthroughs in memory performance through trilateral collaboration between product design, foundry, and memory provider.

The two companies will first focus on improving the performance of the base die that is mounted at the very bottom of the HBM package. HBM is made by stacking a core DRAM die on top of a base die that features TSV¹ technology, and vertically connecting a fixed number of layers in the DRAM stack to the core die with TSV into an HBM package. The base die located at the bottom is connected to the GPU, which controls the HBM.

¹TSV (Through Silicon Via): An interconnect technology that links upper and lower chips with an electrode that vertically passes through the base logic chip and DRAM chips. There can be thousands of pass-through TSVs depending on the chip design

SK hynix has used a proprietary technology to make base dies up to HBM3E, but plans to adopt TSMC’s advanced logic process for HBM4’s base die so additional functionality can be packed into limited space. That also helps SK hynix produce customized HBM that meets a wide range of customer demand for performance and power efficiency.

SK hynix and TSMC also agreed to collaborate to optimize the integration of SK hynix’s HBM and TSMC’s CoWoS^®2 technology, while cooperating in responding to common customers’ requests related to HBM.

²CoWoS (Chip on Wafer on Substrate): A TSMC proprietary packaging process that connects GPU/xPU, a logic chip, and HBM, on a special substrate called an interposer. It is also called 2.5D packaging as the logic chip and the vertically stacked(3D) HBM are integrated into one module which is placed on a horizontal (2D) package substrate

“We expect a strong partnership with TSMC to help accelerate our efforts for open collaboration with our customers and develop the industry’s best-performing HBM4,” said Justin Kim, President and the Head of AI Infra, at SK hynix. “With this cooperation in place, we will strengthen our market leadership as the total AI memory provider further by beefing up competitiveness in the space of the custom memory platform.”

“TSMC and SK hynix have already established a strong partnership over the years. We’ve worked together in integrating the most advanced logic and state-of-the art HBM in providing the world’s leading AI solutions,” said Dr. Kevin Zhang, Senior Vice President of TSMC’s Business Development and Overseas Operations Office, and Deputy Co-Chief Operating Officer. “Looking ahead to the next-generation HBM4, we’re confident that we will continue to work closely in delivering the best-integrated solutions to unlock new AI innovations for our common customers.”

About SK hynix Inc.

SK hynix Inc., headquartered in Korea, is the world’s top tier semiconductor supplier offering Dynamic Random Access Memory chips (“DRAM”), flash memory chips (“NAND flash”) and CMOS Image Sensors (“CIS”) for a wide range of distinguished customers globally. The Company’s shares are traded on the Korea Exchange, and the Global Depository shares are listed on the Luxembourg Stock Exchange. Further information about SK hynix is available at www.skhynix.com, news.skhynix.com.

Media Contact

SK hynix Inc.
Global Public Relations

Technical Leader
Sooyeon Lee
E-Mail: global_newsroom@skhynix.com

Technical Leader
Kanga Kong
E-Mail: global_newsroom@skhynix.com

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