SK hynix broke new technological ground to achieve the recent landmark development of the world’s first DDR5¹ product built using the 1c² node. Boasting improved operating speed and power efficiency compared to the previous generation, the 16 gigabit (Gb) 1c DDR5 represents a monumental leap forward in DRAM process technology.

¹Double Data Rate 5 (DDR5): A server DRAM that effectively handles the increasing demands of larger and more complex data workloads by offering enhanced bandwidth and power efficiency compared to the previous generation, DDR4.
²1c: The sixth generation of the 10 nm DRAM process technology, which was developed in the order of 1x-1y-1z-1a-1b-1c.

The groundbreaking achievement is just the latest in a long line of breakthroughs by the company to advance its DDR5 lineup. This remarkable progress is not only a testament to SK hynix’s technological prowess but also to its innovative approach to the validation process.

This episode of Rulebreakers’ Revolutions will focus on how the company’s differentiated validation strategy is enabling it to navigate the challenges posed by a diversifying server CPU market, contributing to SK hynix’s DRAM leadership including its cutting-edge DDR5 server DRAM.

The Mission: Strengthening Validation in an Increasingly Diverse CPU Market

SK hynix has faced various challenges throughout the successful development of its latest 1bnm and 1cnm DDR5 products. As each generation of DDR5 is based on a new DRAM process technology, a rigorous validation process is required to ensure the products’ performance and reliability as well as their compatibility with customer systems. This means that the company has had to continually adapt and strengthen its approach to validation for next-generation technologies.

In addition to validating new technologies, SK hynix also had to respond to the growing diversity of server CPU suppliers in the market. Traditionally, Intel has dominated the sector which has resulted in semiconductor companies primarily focusing their efforts on validating their products with the U.S. tech giant. However, while Intel still leads the sector, AMD and Arm-based suppliers are gradually increasing their market share, especially in cloud and specialized workloads, creating a more fragmented server CPU landscape.

Amid these shifting market dynamics, SK hynix is required to ensure its DDR5 products’ compatibility and reliability across a broader range of server CPU architectures. This is because CPU companies integrate their chips into a wide range of hardware, placing greater pressure to ensure compatibility with various server CPU types, which is essential for DDR5’s widespread adoption. In particular, early alignment with customers during the product planning stage is increasingly important to meet the needs of various companies and handle numerous server CPU types.

Faced with the challenge of validating new technologies in a diversifying server CPU market, SK hynix is consistently refining its validation methods to ultimately solidify its leadership in the server DRAM field.

SK hynix employs a differentiated validation approach to ensure DDR5’s comparability with various server CPUs

Compatibility, Collaboration, & Customized Testing: Three Cs Key to Optimized Validation

Although SK hynix had an established validation procedure for its products, the company has adjusted its process for the latest DDR5 products. Typically, validation begins in the pre-development stage by verifying that the design meets the specifications required by server customers and adheres to JEDEC³ standards. The company then prepares memory validation samples in collaboration with external partners and aligns the test environment with SoC⁴ companies, which play a key role in validation. While CPU companies are the customers for DDR5, SoC companies provide reputable third-party validation to verify the product’s readiness for real-world system application. Continuing with the validation process, the next stage involves internal testing to identify and resolve any defects. The samples are then sent to SoC companies for further tests to complete the process.

³JEDEC Solid State Technology Association: With over 350 member companies, JEDEC is the global leader in developing open standards for the microelectronics industry.
⁴System-on-chip (Soc): An integrated circuit that combines all the components of an electronic device onto a single chip.

For its recent DDR5 products, however, the company is taking a rulebreaking approach to validation that sets it apart from the rest of the field. This unique method is highlighted in the ongoing validation process for the 1bnm and 1cnm DDR5, which features several differentiated strategies.

For example, to ensure compatibility with a wide range of server CPUs, SK hynix is conducting validation on a wide range of systems—even those that have yet to be released. This involves close collaboration with SoC companies to discuss required technologies and perform co-validation, ensuring that potential issues with samples are addressed early in the development process.

As well as working with external SoC companies, SK hynix is also conducting improved internal collaboration throughout the validation process to enhance the completeness of the 1c DDR5. Departments responsible for process, design, and testing are closely working together to ensure the cost efficiency of test infrastructure and optimize the sample management and testing process. Moreover, the departments are identifying and improving potential defects in advance through rigorous simulation and aging tests, thereby securing the product’s reliability and stability.

Another key step in the validation process involves the development of customer-specific tests based on tailored validation scenarios. Recognizing that each customer has different requirements and various products, SK hynix evaluates and verifies various scenarios at the scale and volume testing stages. By predicting potential defects under actual usage conditions, the company aims to ensure that the 1c DDR5 performs reliably across a wide range of applications and platforms.

SK hynix’s validation strategy involves ensuring broad compatibility, internal collaboration, and customized testing

Validation: The Final Piece of the DDR5 Evolution Puzzle

Since SK hynix launched the world’s first DDR5 DRAM in 2020, rapid and reliable validation has played a crucial role in the company’s outstanding progress in the field. The company’s numerous milestones in DDR5 and DRAM scaling technology include the industry-first validation of its 1anm DDR5 with the 4th Gen Intel® Xeon® Scalable processor in January 2023. In May of the same year, the company announced it had developed the industry’s most advanced 1bnm DDR5 and begun validation with Intel.

While the semiconductor industry has faced increasing difficulty in advancing the 10 nm process technology, SK hynix overcame the obstacles thanks in part to its robust validation strategy. This is set to continue with the validation of its 1c DDR5 product, which aims to verify key specifications of the new DRAM.

The 1c DDR5 offers superior operating speeds and power efficiency compared to the previous generation

In comparison to 1b DDR5, the 1c DDR5 product offers 11% faster operating speeds of 8 gigabits (Gbps) per second and a more than 9% improvement in power efficiency. As part of the validation process which is progressing smoothly, SK hynix is currently working with server CPU suppliers to verify the product’s stable performance and ensure it meets the expected operational standards.

Looking ahead, the successful development of 1c DDR5 has established a benchmark for subsequent DRAM product lines to be developed with the 1c node, including HBM⁵, LPDDR⁶, and GDDR⁷. In terms of validation, the company is striving to enhance the efficiency and overall process for future products. In particular, the company aims to reduce risk factors in future validation processes, ensuring higher quality and reliability for its next-generation products.

⁵High Bandwidth Memory (HBM): A high-value, high-performance product that possesses much higher data processing speeds compared to existing DRAMs by vertically connecting multiple DRAMs with through-silicon via (TSV).
⁶Low Power Double Data Rate (LPDDR): A line of low-power DRAM for mobile devices, including smartphones and tablets, aimed at minimizing power consumption and featuring low voltage operation.
⁷Graphics DDR (GDDR): A standard specification of graphics DRAM defined by the Joint Electron Device Engineering Council (JEDEC) and specialized for processing graphics more quickly. It is now one of the most popular memory chips for AI and big data applications.

Rulebreaker Interview: Yoosung Lee, DRAM Server Product Planning

To find out more about the company’s innovative approach to validation, the SK hynix Newsroom spoke with Technical Leader (TL) Yoosung Lee of DRAM Server Product Planning. Lee’s department plays a key role in collaborating with customers such as SoC companies to validate products. He discussed how the company encourages employees to take a different approach to their work and the improvement plans for validation.

<Other articles from this series>

[Rulebreakers’ Revolutions] How MR-MUF’s Heat Control Breakthrough Elevated HBM to New Heights

[Rulebreakers’ Revolutions] How SK hynix Broke Barriers in Mobile DRAM Scaling With World-First HKMG Application

[Rulebreakers’ Revolutions] Innovative Design Scheme Helps HBM3E Reach New Heights

The post [Rulebreakers’ Revolutions] How SK hynix’s Server DRAM Validation Process Succeeds in a Diverse Server CPU Market first appeared on SK hynix Newsroom.

SK hynix announced that its DRAM, and CXL solutions have been validated with the new AMD^* EPYC 9004 Series processors, which were unveiled during the company’s “together we advance_data centers” event on November 10.

SK hynix has worked closely with AMD to provide fully compatible memory solutions for the 4^th Gen AMD EPYC processors.

4^th Gen AMD EPYC processors are built on an all-new SP5 socket and offer innovative technologies and features including support for advanced DDR5 and CXL 1.1+ memory expansion.

SK hynix 1ynm, 1anm 16Gb DDR5 and 1anm 24Gb DDR5 DRAM support 4800Mbps on 4^th Gen AMD EPYC processors, which deliver up to 50% more memory bandwidth than DDR4 product.

SK hynix also provides CXL memory device that is a 96GB product composed of 24Gb DDR5 DRAMs based on 1anm. The company expects high customer satisfaction of this product with flexible configuration of bandwidth and capacity expanded cost-efficiently.

“The collaboration with AMD will strengthen SK hynix’s position as a memory solution provider in the server market,” said Sungsoo Ryu, Head of DRAM Product Planning and Enabling at SK hynix. “The latest AMD EPYC Processor will pave the way for our new server memory interface – DDR5 and CXL – to deliver exceptional performance to the market.”

With regard to collaboration on NAND, Chee Hoe Chu, Vice President of System Engineering at SK hynix memory solutions America, said the following. “AMD and SK hynix have collaborated on testing stability of PCIe Gen5 connections on reference architectures supporting the 4^th Gen AMD EPYC processors. This collaboration has enabled SK hynix to deliver highly performant PCIe Gen 5 NVMe solutions with its PS10x0, and respond to demands from today’s AI and ML application market.”

“Building on the record-breaking performance of 3^rd Gen AMD EPYC processors, the latest 4^th Gen AMD EPYC processors help our customers achieve better business outcomes faster and address their most ambitious energy efficiency goals. Our new “Zen 4” architecture is optimized for modern workloads and delivers the core density, memory bandwidth and sophisticated security features customers demand,” said Ram Peddibhotla, corporate vice president, EPYC product management, AMD.

The post SK hynix DDR5 & CXL Solutions Validated with AMD EPYC 9004 Series Processors first appeared on SK hynix Newsroom.

In order to obtain validation from PBOC, Hyundai conducted a joint development project for one year with Hyundai Estie, a Korean venture firm specializing in smart cards. PBOC’s validation certifies that Hyundai’s smart card chip technology and Hyundai Estie’s COS technology are both world-class technologies. In 1998, PBOC established the technological and security standards for bank cards, electronic purses, transportation cards, social security cards, and other related products. Therefore, providers must obtain validation from PBOC in order to sell such products to the Chinese market. Hyundai has successfully completed all required tests for smart card chips, COS, Chip on Board packages, and plastic cards in an official PBOC test center, an independent testing institution operated by the Chinese government. Hyundai has agreed to supply 42 million units of product to Chinese System Integration( SI ) businesses over the next five years. Hyundai plans to export product valued at $5 million this year and $20 million next year, reaching a total of at least $100 million in exports over the next three years. Hyundai Estie Co. Ltd. is a company that was spun-off from Hyundai’s integrated circuit card business unit, which handles banking cards and related handsets, as well as SI business, including development of COS, the core technology of smart card chips. Hyundai Estie has contracts for K-CASH smart cards with five main Korean banks and plans to extend its business globally, including China.

The post Hyundai receives standard validation for electronic money in China first appeared on SK hynix Newsroom.